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Searched refs:TRN2 (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedKryoDetails.td2329 (instregex "((TRN1|TRN2|ZIP1|UZP1|UZP2)v2i64|ZIP2(v2i64|v4i32|v8i16|v16i8))")>;
2335 (instregex "(TRN1|TRN2)(v4i32|v8i16|v16i8)")>;
2341 (instregex "(TRN1|TRN2)(v2i32|v4i16|v8i8)")>;
H A DAArch64ISelLowering.h216 TRN2, enumerator
H A DAArch64SchedFalkorDetails.td920 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(TRN1|TRN2|ZIP1|UZP1|UZP2|ZIP2|XTN)(v2i32|v2i64|v4i16|v4i32|v8i8|v8i16|v16i8)$")>;
H A DAArch64SchedThunderX3T110.td1639 def : InstRW<[THX3T110Write_5Cyc_F0123], (instregex "^TRN1", "^TRN2")>;
H A DAArch64ISelLowering.cpp2639 MAKE_CASE(AArch64ISD::TRN2) in getTargetNodeName()
5768 return DAG.getNode(AArch64ISD::TRN2, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
12841 return DAG.getNode(AArch64ISD::TRN2, dl, VT, OpLHS, OpRHS); in GeneratePerfectShuffle()
13242 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerVECTOR_SHUFFLE()
13255 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerVECTOR_SHUFFLE()
28261 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28271 unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; in LowerFixedLengthVECTOR_SHUFFLEToSVE()
28748 case AArch64ISD::TRN2: in verifyTargetSDNode()
H A DAArch64InstrInfo.td749 def AArch64trn2 : SDNode<"AArch64ISD::TRN2", SDT_AArch64Zip>;
6513 defm TRN2 : SIMDZipVector<0b110, "trn2", AArch64trn2>;