Home
last modified time | relevance | path

Searched refs:TRCEVENTCTL1R (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/arm64/coresight/
H A Dcoresight_etm4x.h68 #define TRCEVENTCTL1R 0x024 /* Trace Event Control 1 Register */ macro
H A Dcoresight_etm4x.c91 bus_write_4(sc->res, TRCEVENTCTL1R, 0); in etm_prepare()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td1128 def : RWSysReg<"TRCEVENTCTL1R", 0b10, 0b001, 0b0000, 0b1001, 0b000>;