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Searched refs:TI (Results 1 – 25 of 483) sorted by relevance

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/freebsd/contrib/llvm-project/clang/lib/Frontend/
H A DInitPreprocessor.cpp184 const TargetInfo &TI, MacroBuilder &Builder) { in DefineTypeSize() argument
185 DefineTypeSize(MacroName, TI.getTypeWidth(Ty), TI.getTypeConstantSuffix(Ty), in DefineTypeSize()
186 TI.isTypeSigned(Ty), Builder); in DefineTypeSize()
190 TargetInfo::IntType Ty, const TargetInfo &TI, in DefineFmt() argument
192 StringRef FmtModifier = TI.getTypeFormatModifier(Ty); in DefineFmt()
197 bool IsSigned = TI.isTypeSigned(Ty); in DefineFmt()
212 const TargetInfo &TI, MacroBuilder &Builder) { in DefineTypeWidth() argument
213 Builder.defineMacro(MacroName, Twine(TI.getTypeWidth(Ty))); in DefineTypeWidth()
217 const TargetInfo &TI, MacroBuilder &Builder) { in DefineTypeSizeof() argument
219 Twine(BitWidth / TI.getCharWidth())); in DefineTypeSizeof()
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/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/LogicalView/Readers/
H A DLVCodeViewVisitor.h56 void printTypeIndex(StringRef FieldName, TypeIndex TI,
69 Error visitTypeBegin(CVType &Record, TypeIndex TI) override;
151 void printTypeIndex(StringRef FieldName, TypeIndex TI) const;
271 Error visitFieldListMemberStream(TypeIndex TI, LVElement *Element,
274 LVType *createBaseType(TypeIndex TI, StringRef TypeName);
275 LVType *createPointerType(TypeIndex TI, StringRef TypeName);
276 LVSymbol *createParameter(TypeIndex TI, StringRef Name, LVScope *Parent);
302 void addInlineeInfo(TypeIndex TI, uint32_t LineNumber, StringRef Filename) { in addInlineeInfo()
303 InlineeInfo.emplace(std::piecewise_construct, std::forward_as_tuple(TI), in addInlineeInfo()
307 void printTypeIndex(StringRef FieldName, TypeIndex TI, uint32_
301 addInlineeInfo(TypeIndex TI,uint32_t LineNumber,StringRef Filename) addInlineeInfo() argument
445 visitKnownMember(CVMemberRecord & Record,TypeVisitorCallbacks & Callbacks,TypeIndex TI,LVElement * Element) visitKnownMember() argument
457 visitKnownRecord(CVType & Record,TypeIndex TI,LVElement * Element) visitKnownRecord() argument
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/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/CodeView/
H A DTypeIndex.cpp71 StringRef TypeIndex::simpleTypeName(TypeIndex TI) { in simpleTypeName() argument
72 assert(TI.isNoneType() || TI.isSimple()); in simpleTypeName()
74 if (TI.isNoneType()) in simpleTypeName()
77 if (TI == TypeIndex::NullptrT()) in simpleTypeName()
82 if (SimpleTypeName.Kind == TI.getSimpleKind()) { in simpleTypeName()
83 if (TI.getSimpleMode() == SimpleTypeMode::Direct) in simpleTypeName()
94 TypeIndex TI, TypeCollection &Types) { in printTypeIndex() argument
96 if (!TI.isNoneType()) { in printTypeIndex()
97 if (TI.isSimple()) in printTypeIndex()
98 TypeName = TypeIndex::simpleTypeName(TI); in printTypeIndex()
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H A DLazyRandomTypeCollection.cpp148 Error LazyRandomTypeCollection::ensureTypeExists(TypeIndex TI) {
149 if (contains(TI)) in ensureTypeExists() argument
152 return visitRangeForType(TI); in ensureTypeExists()
168 Error LazyRandomTypeCollection::visitRangeForType(TypeIndex TI) {
169 assert(!TI.isSimple()); in visitRangeForType() argument
171 return fullScanForType(TI); in visitRangeForType()
173 auto Next = llvm::upper_bound(PartialOffsets, TI, in visitRangeForType()
203 TypeIndex TI = TypeIndex::fromArrayIndex(0); in getFirst()
204 if (auto EC = ensureTypeExists(TI)) { in getFirst() local
208 return TI; in getFirst()
224 fullScanForType(TypeIndex TI) fullScanForType() argument
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H A DTypeHashing.cpp55 for (TypeIndex TI : Indices) { in hashType() local
57 if (TI.isSimple() || TI.isNoneType()) { in hashType()
58 const uint8_t *IndexBytes = reinterpret_cast<const uint8_t *>(&TI); in hashType()
61 if (TI.toArrayIndex() >= Prev.size() || in hashType()
62 Prev[TI.toArrayIndex()].empty()) { in hashType()
67 BytesToHash = Prev[TI.toArrayIndex()].Hash; in hashType()
H A DTypeRecordHelpers.cpp54 uint64_t llvm::codeview::getSizeInBytesForTypeIndex(TypeIndex TI) { in getSizeInBytesForTypeIndex() argument
55 if (!TI.isSimple()) in getSizeInBytesForTypeIndex()
57 if (TI.getSimpleMode() != SimpleTypeMode::Direct) { in getSizeInBytesForTypeIndex()
59 switch (TI.getSimpleMode()) { in getSizeInBytesForTypeIndex()
75 switch (TI.getSimpleKind()) { in getSizeInBytesForTypeIndex()
/freebsd/contrib/file/magic/Magdir/
H A Dti-8x4 # ti-8x: file(1) magic for the TI-8x and TI-9x Graphing Calculators.
11 # Files for the TI-80 and TI-81 are pretty rare. I'm not going to put the
13 0 string **TI80** TI-80 Graphing Calculator File.
14 0 string **TI81** TI-81 Graphing Calculator File.
16 # Magic Numbers for the TI-73
18 0 string **TI73** TI-73 Graphing Calculator
34 # Magic Numbers for the TI-82
36 0 string **TI82** TI-82 Graphing Calculator
51 # Magic Numbers for the TI-83
53 0 string **TI83** TI-83 Graphing Calculator
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/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/LogicalView/Readers/
H A DLVCodeViewVisitor.cpp50 static TypeIndex getTrueType(TypeIndex &TI) { in getTrueType() argument
71 { dbgs() << "Index before: " << HexNumber(TI.getIndex()) << "\n"; }); in getTrueType()
72 TI.setIndex(TI.getIndex() & 0x0000ffff); in getTrueType()
74 { dbgs() << "Index after: " << HexNumber(TI.getIndex()) << "\n"; }); in getTrueType()
75 return TI; in getTrueType()
85 static StringRef getRecordName(LazyRandomTypeCollection &Types, TypeIndex TI) { in getRecordName() argument
86 if (TI.isSimple()) in getRecordName()
90 CVType CVReference = Types.getType(TI); in getRecordName()
140 void add(uint32_t StreamIdx, TypeIndex TI, TypeLeafKind Kind,
142 void add(uint32_t StreamIdx, TypeIndex TI, StringRef Name);
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyLateEHPrepare.cpp157 MachineInstr *TI = &*Pos; in recordCatchRetBBs() local
158 if (TI->getOpcode() == WebAssembly::CATCHRET) in recordCatchRetBBs()
235 MachineInstr *TI = &*Pos; in replaceFuncletReturns() local
237 switch (TI->getOpcode()) { in replaceFuncletReturns()
240 MachineBasicBlock *TBB = TI->getOperand(0).getMBB(); in replaceFuncletReturns()
242 BuildMI(MBB, TI, TI->getDebugLoc(), TII.get(WebAssembly::BR)) in replaceFuncletReturns()
244 TI->eraseFromParent(); in replaceFuncletReturns()
267 TI->removeOperand(0); in replaceFuncletReturns()
268 TI->addOperand(MachineOperand::CreateMBB(getMatchingEHPad(TI))); in replaceFuncletReturns()
279 BuildMI(MBB, TI, TI->getDebugLoc(), TII.get(WebAssembly::RETHROW)) in replaceFuncletReturns()
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dti,sci-reset.txt1 Texas Instruments System Control Interface (TI-SCI) Reset Controller
4 Some TI SoCs contain a system controller (like the Power Management Micro
8 through a protocol called TI System Control Interface (TI-SCI protocol).
9 For TI SCI details, please refer to the document,
12 TI-SCI Reset Controller Node
14 This reset controller node uses the TI SCI protocol to perform the reset
16 node of the associated TI-SCI system controller node.
24 TI-SCI Reset Consumer Nodes
33 The phandle should point to the TI-SCI reset controller node,
46 The following example demonstrates both a TI-SCI reset controller node and a
/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/
H A DNativeEnumTypes.cpp29 std::optional<TypeIndex> TI = Types.getFirst(); in NativeEnumTypes() local
30 while (TI) { in NativeEnumTypes()
31 CVType CVT = Types.getType(*TI); in NativeEnumTypes()
36 Matches.push_back(*TI); in NativeEnumTypes()
45 Matches.push_back(*TI); in NativeEnumTypes()
48 TI = Types.getNext(*TI); in NativeEnumTypes()
H A DNativeTypePointer.cpp21 codeview::TypeIndex TI) in NativeTypePointer() argument
22 : NativeRawSymbol(Session, PDB_SymType::PointerType, Id), TI(TI) { in NativeTypePointer()
23 assert(TI.isSimple()); in NativeTypePointer()
24 assert(TI.getSimpleMode() != SimpleTypeMode::Direct); in NativeTypePointer()
28 codeview::TypeIndex TI, in NativeTypePointer() argument
30 : NativeRawSymbol(Session, PDB_SymType::PointerType, Id), TI(TI), in NativeTypePointer()
83 switch (TI.getSimpleMode()) { in getLength()
103 TypeIndex Referent = Record ? Record->ReferentType : TI.makeDirect(); in getTypeId()
H A DTpiStream.cpp169 for (TypeIndex TI : HashMap[Bucket]) { in findRecordsByName() local
170 std::string ThisName = computeTypeName(*Types, TI); in findRecordsByName()
172 Result.push_back(TI); in findRecordsByName()
194 for (TypeIndex TI : HashMap[BucketIdx]) { in findFullDeclForForwardRef() local
195 CVType CVT = Types->getType(TI); in findFullDeclForForwardRef()
209 return TI; in findFullDeclForForwardRef()
216 return TI; in findFullDeclForForwardRef()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DSparsePropagation.h193 void getFeasibleSuccessors(Instruction &TI, SmallVectorImpl<bool> &Succs,
198 void visitTerminator(Instruction &TI);
290 Instruction &TI, SmallVectorImpl<bool> &Succs, bool AggressiveUndef) { in getFeasibleSuccessors() argument
291 Succs.resize(TI.getNumSuccessors()); in getFeasibleSuccessors()
292 if (TI.getNumSuccessors() == 0) in getFeasibleSuccessors()
295 if (BranchInst *BI = dyn_cast<BranchInst>(&TI)) { in getFeasibleSuccessors()
334 if (!isa<SwitchInst>(TI)) { in getFeasibleSuccessors()
340 SwitchInst &SI = cast<SwitchInst>(TI); in getFeasibleSuccessors()
351 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
363 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DBreakCriticalEdges.cpp101 BasicBlock *llvm::SplitCriticalEdge(Instruction *TI, unsigned SuccNum, in SplitCriticalEdge() argument
104 if (!isCriticalEdge(TI, SuccNum, Options.MergeIdenticalEdges)) in SplitCriticalEdge()
107 return SplitKnownCriticalEdge(TI, SuccNum, Options, BBName); in SplitCriticalEdge()
111 llvm::SplitKnownCriticalEdge(Instruction *TI, unsigned SuccNum, in SplitKnownCriticalEdge() argument
114 assert(!isa<IndirectBrInst>(TI) && in SplitKnownCriticalEdge()
117 BasicBlock *TIBB = TI->getParent(); in SplitKnownCriticalEdge()
118 BasicBlock *DestBB = TI->getSuccessor(SuccNum); in SplitKnownCriticalEdge()
170 NewBB = BasicBlock::Create(TI->getContext(), BBName); in SplitKnownCriticalEdge()
172 NewBB = BasicBlock::Create(TI->getContext(), TIBB->getName() + "." + in SplitKnownCriticalEdge()
177 NewBI->setDebugLoc(TI->getDebugLoc()); in SplitKnownCriticalEdge()
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H A DEscapeEnumerator.cpp40 Instruction *TI = CurBB->getTerminator(); in Next() local
41 if (!isa<ReturnInst>(TI) && !isa<ResumeInst>(TI)) in Next()
45 TI = CI; in Next()
46 Builder.SetInsertPoint(TI); in Next()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PointerAuth.cpp60 bool checkAuthenticatedLR(MachineBasicBlock::iterator TI) const;
178 MachineBasicBlock::iterator TI = MBB.getFirstInstrTerminator(); in authenticateLR() local
186 TI != MBB.end() && TI->getOpcode() == AArch64::RET; in authenticateLR()
193 BuildMI(MBB, TI, DL, in authenticateLR()
199 BuildPACM(*Subtarget, MBB, TI, DL, MachineInstr::FrameDestroy, PACSym); in authenticateLR()
200 BuildMI(MBB, TI, DL, TII->get(UseBKey ? AArch64::RETAB : AArch64::RETAA)) in authenticateLR()
204 MBB.erase(TI); in authenticateLR()
339 MachineBasicBlock::iterator TI) const { in checkAuthenticatedLR()
340 const AArch64FunctionInfo *MFnI = TI->getMF()->getInfo<AArch64FunctionInfo>(); in checkAuthenticatedLR()
345 Subtarget->getAuthenticatedLRCheckMethod(*TI->getMF()); in checkAuthenticatedLR()
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/freebsd/contrib/llvm-project/clang/lib/Basic/
H A DOpenCLOptions.cpp123 const TargetInfo &TI, DiagnosticsEngine &Diags) { in diagnoseUnsupportedFeatureDependencies() argument
124 auto OpenCLFeaturesMap = TI.getSupportedOpenCLOpts(); in diagnoseUnsupportedFeatureDependencies()
130 if (TI.hasFeatureEnabled(OpenCLFeaturesMap, Feature) && in diagnoseUnsupportedFeatureDependencies()
131 !TI.hasFeatureEnabled(OpenCLFeaturesMap, Dep)) { in diagnoseUnsupportedFeatureDependencies()
140 const TargetInfo &TI, DiagnosticsEngine &Diags) { in diagnoseFeatureExtensionDifferences() argument
141 auto OpenCLFeaturesMap = TI.getSupportedOpenCLOpts(); in diagnoseFeatureExtensionDifferences()
145 if (TI.hasFeatureEnabled(OpenCLFeaturesMap, ExtAndFeat.first) != in diagnoseFeatureExtensionDifferences()
146 TI.hasFeatureEnabled(OpenCLFeaturesMap, ExtAndFeat.second)) { in diagnoseFeatureExtensionDifferences()
/freebsd/contrib/llvm-project/clang/include/clang/Sema/
H A DSemaARM.h42 bool CheckNeonBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
50 bool CheckCDEBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
52 bool CheckARMCoprocessorImmediate(const TargetInfo &TI, const Expr *CoprocArg,
54 bool CheckARMBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
57 bool CheckAArch64BuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
/freebsd/sys/contrib/device-tree/Bindings/arm/keystone/
H A Dti,sci.txt1 Texas Instruments System Control Interface (TI-SCI) Message Protocol
16 TI-SCI controller Device Node:
19 The TI-SCI node describes the Texas Instrument's System Controller entity node.
23 relationship between the TI-SCI parent node to the child node.
27 - compatible: should be "ti,k2g-sci" for TI 66AK2G SoC
28 should be "ti,am654-sci" for for TI AM654 SoC
66 TI-SCI Client Device Node:
69 Client nodes are maintained as children of the relevant TI-SCI device node.
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dti-bluetooth.txt5 attached TI Bluetooth devices. The following chips are included in this
8 * TI CC256x Bluetooth devices
9 * TI WiLink 7/8 (wl12xx/wl18xx) Shared Transport BT/FM/GPS devices
11 TI WiLink devices have a UART interface for providing Bluetooth, FM radio,
15 TI WiLink devices also have a separate WiFi interface as described in
42 "ext_clock" (External clock provided to the TI combo chip).
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DSimpleLoopUnswitch.cpp160 Instruction *TI = nullptr; member
165 Instruction *TI, ArrayRef<Value *> Invariants, in NonTrivialUnswitchCandidate()
168 : TI(TI), Invariants(Invariants), Cost(Cost), in NonTrivialUnswitchCandidate()
771 auto *TI = BBToCheck.getTerminator(); in unswitchTrivialSwitch() local
772 bool isUnreachable = isa<UnreachableInst>(TI); in unswitchTrivialSwitch()
774 (isUnreachable && (BBToCheck.getFirstNonPHIOrDbg() != TI)); in unswitchTrivialSwitch()
2176 Loop &L, Instruction &TI, ArrayRef<Value *> Invariants, in unswitchNontrivialInvariants() argument
2180 auto *ParentBB = TI.getParent(); in unswitchNontrivialInvariants()
2181 BranchInst *BI = dyn_cast<BranchInst>(&TI); in unswitchNontrivialInvariants()
2182 SwitchInst *SI = BI ? nullptr : cast<SwitchInst>(&TI); in unswitchNontrivialInvariants()
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DCFG.cpp95 bool llvm::isCriticalEdge(const Instruction *TI, unsigned SuccNum, in isCriticalEdge() argument
97 assert(SuccNum < TI->getNumSuccessors() && "Illegal edge specification!"); in isCriticalEdge()
98 return isCriticalEdge(TI, TI->getSuccessor(SuccNum), AllowIdenticalEdges); in isCriticalEdge()
101 bool llvm::isCriticalEdge(const Instruction *TI, const BasicBlock *Dest, in isCriticalEdge() argument
103 assert(TI->isTerminator() && "Must be a terminator to have successors!"); in isCriticalEdge()
104 if (TI->getNumSuccessors() == 1) return false; in isCriticalEdge()
106 assert(is_contained(predecessors(Dest), TI->getParent()) && in isCriticalEdge()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroElide.cpp321 auto TI = BB->getTerminator(); in canCoroBeginEscape() local
325 if (isa<SwitchInst>(TI) && in canCoroBeginEscape()
326 FEI.CoroSuspendSwitches.count(cast<SwitchInst>(TI))) { in canCoroBeginEscape()
327 Worklist.push_back(cast<SwitchInst>(TI)->getSuccessor(1)); in canCoroBeginEscape()
328 Worklist.push_back(cast<SwitchInst>(TI)->getSuccessor(2)); in canCoroBeginEscape()
357 auto *TI = B.getTerminator(); in lifetimeEligibleForElide() local
359 if (TI->getNumSuccessors() != 0 || isa<UnreachableInst>(TI)) in lifetimeEligibleForElide()
378 auto DominatesTerminator = [&](auto *TI) { in lifetimeEligibleForElide() argument
380 return DT.dominates(Destroy, TI->getTerminator()); in lifetimeEligibleForElide()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZLongBranch.cpp357 SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin(); in setWorstCaseAddresses() local
362 skipTerminator(Position, *TI, true); in setWorstCaseAddresses()
363 ++TI; in setWorstCaseAddresses()
458 SmallVector<TerminatorInfo, 16>::iterator TI = Terminators.begin(); in relaxBranches() local
463 assert(Position.Address <= TI->Address && in relaxBranches()
465 if (mustRelaxBranch(*TI, Position.Address)) in relaxBranches()
466 relaxBranch(*TI); in relaxBranches()
467 skipTerminator(Position, *TI, false); in relaxBranches()
468 ++TI; in relaxBranches()

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