Lines Matching refs:TI
193 void getFeasibleSuccessors(Instruction &TI, SmallVectorImpl<bool> &Succs,
198 void visitTerminator(Instruction &TI);
290 Instruction &TI, SmallVectorImpl<bool> &Succs, bool AggressiveUndef) { in getFeasibleSuccessors() argument
291 Succs.resize(TI.getNumSuccessors()); in getFeasibleSuccessors()
292 if (TI.getNumSuccessors() == 0) in getFeasibleSuccessors()
295 if (BranchInst *BI = dyn_cast<BranchInst>(&TI)) { in getFeasibleSuccessors()
334 if (!isa<SwitchInst>(TI)) { in getFeasibleSuccessors()
340 SwitchInst &SI = cast<SwitchInst>(TI); in getFeasibleSuccessors()
351 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
363 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
374 Instruction *TI = From->getTerminator(); in isEdgeFeasible() local
375 getFeasibleSuccessors(*TI, SuccFeasible, AggressiveUndef); in isEdgeFeasible()
377 for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i) in isEdgeFeasible()
378 if (TI->getSuccessor(i) == To && SuccFeasible[i]) in isEdgeFeasible()
386 Instruction &TI) { in visitTerminator() argument
388 getFeasibleSuccessors(TI, SuccFeasible, true); in visitTerminator()
390 BasicBlock *BB = TI.getParent(); in visitTerminator()
395 markEdgeExecutable(BB, TI.getSuccessor(i)); in visitTerminator()