| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSystemOperands.td | 20 class SysReg<string name, bits<12> op> {
43 let FilterClass = "SysReg";
78 def SysRegFFLAGS : SysReg<"fflags", 0x001>;
79 def SysRegFRM : SysReg<"frm", 0x002>;
80 def SysRegFCSR : SysReg<"fcsr", 0x003>;
85 def CYCLE : SysReg<"cycle", 0xC00>;
86 def TIME : SysReg<"time", 0xC01>;
87 def INSTRET : SysReg<"instret", 0xC02>;
91 def : SysReg<"hpmcounter"#i, !add(0xC03, !sub(i, 3))>;
94 def CYCLEH : SysReg<"cycleh", 0xC80>;
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| H A D | RISCVInstrInfo.td | 1746 class ReadSysReg<SysReg SR, list<Register> Regs>
1754 class WriteSysReg<SysReg SR, list<Register> Regs>
1762 class WriteSysRegImm<SysReg SR, list<Register> Regs>
1770 class SwapSysReg<SysReg SR, list<Register> Regs>
1779 class SwapSysRegImm<SysReg SR, list<Register> Regs>
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 400 struct SysRegOp SysReg; member
430 SysReg = o.SysReg; in RISCVOperand()
1016 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
1143 Op->SysReg.Data = Str.data(); in createSysReg()
1144 Op->SysReg.Length = Str.size(); in createSysReg()
1145 Op->SysReg.Encoding = Encoding; in createSysReg()
1244 Inst.addOperand(MCOperand::createImm(SysReg.Encoding)); in addCSRSystemRegisterOperands()
1916 auto SysReg = RISCVSysReg::lookupSysRegByName(Identifier); in parseCSRSystemRegister() local
1917 if (!SysReg) in parseCSRSystemRegister()
1918 SysReg = RISCVSysReg::lookupSysRegByAltName(Identifier); in parseCSRSystemRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 683 struct SysReg { struct
700 const SysReg *lookupSysRegByName(StringRef); argument
701 const SysReg *lookupSysRegByEncoding(uint16_t);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 510 struct SysRegOp SysReg; member
568 SysReg = o.SysReg; in AArch64Operand()
713 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
1184 return SysReg.MRSReg != -1U; in isMRSSystemRegister()
1189 return SysReg.MSRReg != -1U; in isMSRSystemRegister()
1194 return AArch64PState::lookupPStateImm0_1ByEncoding(SysReg.PStateField); in isSystemPStateFieldWithImm0_1()
1200 return AArch64PState::lookupPStateImm0_15ByEncoding(SysReg.PStateField); in isSystemPStateFieldWithImm0_15()
2104 Inst.addOperand(MCOperand::createImm(SysReg.MRSReg)); in addMRSSystemRegisterOperands()
2110 Inst.addOperand(MCOperand::createImm(SysReg.MSRReg)); in addMSRSystemRegisterOperands()
2116 Inst.addOperand(MCOperand::createImm(SysReg.PStateField)); in addSystemPStateFieldWithImm0_1Operands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 1441 auto SysReg = AArch64SysReg::TPIDR_EL0; in expandMI() local
1444 SysReg = AArch64SysReg::TPIDR_EL3; in expandMI()
1446 SysReg = AArch64SysReg::TPIDR_EL2; in expandMI()
1448 SysReg = AArch64SysReg::TPIDR_EL1; in expandMI()
1450 SysReg = AArch64SysReg::TPIDRRO_EL0; in expandMI()
1452 .addImm(SysReg); in expandMI()
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| H A D | AArch64SystemOperands.td | 658 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
678 : SysReg<name, op0, op1, crn, crm, op2> {
685 : SysReg<name, op0, op1, crn, crm, op2> {
692 : SysReg<name, op0, op1, crn, crm, op2> {
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| H A D | AArch64InstrInfo.cpp | 2003 const AArch64SysReg::SysReg *SrcReg = in expandPostRAPseudo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVBaseInfo.h | 403 struct SysReg { struct
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1864 static bool isValidSysReg(const AArch64SysReg::SysReg *Reg, bool Read, in lookupSysReg()
1876 static const AArch64SysReg::SysReg *lookupSysReg(unsigned Val, bool Read, in printMRSSystemRegister()
1878 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMRSSystemRegister()
1905 const AArch64SysReg::SysReg *Reg = lookupSysReg(Val, true /*Read*/, STI); in printMSRSystemRegister()
1932 const AArch64SysReg::SysReg *Reg = lookupSysReg(Val, false /*Read*/, STI); in printSystemPStateField()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 2850 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2859 let Inst{22} = SysReg{3};
2863 let Inst{15-13} = SysReg{2-0};
2872 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2875 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2882 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2890 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 8486 StringRef SysReg = "") { in EmitSpecialRegisterBuiltin() argument
8496 if (SysReg.empty()) { in EmitSpecialRegisterBuiltin()
8498 SysReg = cast<clang::StringLiteral>(SysRegStrExpr)->getString(); in EmitSpecialRegisterBuiltin()
8501 llvm::Metadata *Ops[] = { llvm::MDString::get(Context, SysReg) }; in EmitSpecialRegisterBuiltin()
11424 unsigned SysReg = in EmitAArch64BuiltinExpr() local
11429 ((1 << 1) | ((SysReg >> 14) & 1)) << ":" << in EmitAArch64BuiltinExpr()
11430 ((SysReg >> 11) & 7) << ":" << in EmitAArch64BuiltinExpr()
11431 ((SysReg >> 7) & 15) << ":" << in EmitAArch64BuiltinExpr()
11432 ((SysReg >> 3) & 15) << ":" << in EmitAArch64BuiltinExpr()
11433 ( SysReg & 7); in EmitAArch64BuiltinExpr()
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