Home
last modified time | relevance | path

Searched refs:Super (Results 1 – 25 of 104) sorted by relevance

12345

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp133 const TargetRegisterClass *Super = RC; in getLargestLegalSuperClass() local
137 switch (Super->getID()) { in getLargestLegalSuperClass()
142 getRegSizeInBits(*Super) == getRegSizeInBits(*RC)) in getLargestLegalSuperClass()
143 return Super; in getLargestLegalSuperClass()
149 getRegSizeInBits(*Super) == getRegSizeInBits(*RC)) in getLargestLegalSuperClass()
150 return Super; in getLargestLegalSuperClass()
156 getRegSizeInBits(*Super) == getRegSizeInBits(*RC)) in getLargestLegalSuperClass()
157 return Super; in getLargestLegalSuperClass()
163 getRegSizeInBits(*Super) == getRegSizeInBits(*RC)) in getLargestLegalSuperClass()
164 return Super; in getLargestLegalSuperClass()
[all …]
H A DX86CompressEVEX.cpp252 Register Super = getX86SubSuperRegister(Dst, 64); in CompressEVEXImpl() local
253 if (MI.definesRegister(Super, /*TRI=*/nullptr)) in CompressEVEXImpl()
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp110 for (MCPhysReg Super : superregs(Reg)) in getMatchingSuperReg() local
111 if (RC->contains(Super) && Reg == getSubReg(Super, SubIdx)) in getMatchingSuperReg()
112 return Super; in getMatchingSuperReg()
/freebsd/contrib/llvm-project/llvm/lib/TextAPI/
H A DRecordsSlice.cpp42 auto [Super, IVar] = Name.split('.'); in addRecord()
44 ObjCContainerRecord *Container = findContainer(/*isIVar=*/false, Super); in addRecord()
47 Container = addObjCCategory(Super, {}); in addRecord()
57 StringRef Super = IsIVar ? Name.split('.').first : Name; in findContainer() local
58 ObjCContainerRecord *Container = findObjCInterface(Super); in findContainer()
62 Container = findObjCCategory(Super, ""); in findContainer()
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DFoldingSet.h540 using Super = FoldingSetImpl<FoldingSet, T>; variable
541 using Node = typename Super::Node;
573 friend Super; variable
576 explicit FoldingSet(unsigned Log2InitSize = 6) : Super(Log2InitSize) {} in Super() function
598 using Super = FoldingSetImpl<ContextualFoldingSet, T>; variable
599 using Node = typename Super::Node;
635 friend Super; variable
639 : Super(Log2InitSize), Context(Context) {} in Super() function
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp623 for (const auto &[Super, Loc] : Proto->getDirectSuperClasses()) in expand()
624 NewReg->addDirectSuperClass(Super, Loc); in expand()
790 CodeGenRegisterClass &Super = NearestAllocSCRIt == SuperClasses.rend() in inheritProperties() local
796 Namespace = Super.Namespace; in inheritProperties()
797 VTs = Super.VTs; in inheritProperties()
798 CopyCost = Super.CopyCost; in inheritProperties()
799 Allocatable = Super.Allocatable; in inheritProperties()
800 AltOrderSelect = Super.AltOrderSelect; in inheritProperties()
801 AllocationPriority = Super.AllocationPriority; in inheritProperties()
802 GlobalPriority = Super.GlobalPriority; in inheritProperties()
[all …]
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DNestedNameSpecifier.cpp151 return Super; in getKind()
211 case Super: { in getDependence()
288 case SpecifierKind::Super: in translateToType()
323 case Super: in print()
371 case NestedNameSpecifier::Super: in getLocalDataLength()
422 case NestedNameSpecifier::Super: in getLocalSourceRange()
644 case NestedNameSpecifier::Super: in MakeTrivial()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp188 if (const TargetRegisterClass *Super = in compute() local
190 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedMIPSP8700.td35 def p8700IssueAL2 : ProcResource<1> { let Super = p8700AGQ; }
36 def p8700IssueCTI : ProcResource<1> { let Super = p8700AGQ; }
37 def p8700IssueLSU : ProcResource<1> { let Super = p8700AGQ; }
133 def p8700IssueFPUS : ProcResource<1> { let Super = p8700FPQ; }
134 def p8700IssueFPUL : ProcResource<1> { let Super = p8700FPQ; }
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp78 for (MCPhysReg Super : superregs(Reg)) in getMatchingMegaReg() local
79 if (RC->contains(Super)) in getMatchingMegaReg()
80 return Super; in getMatchingMegaReg()
/freebsd/contrib/file/magic/Magdir/
H A Dhitachi-sh4 # hitach-sh: file(1) magic for Hitachi Super-H
6 # Super-H COFF
/freebsd/contrib/one-true-awk/testdir/
H A Dtest.data140 1root:EMpNB8Zp56:0:0:Super-User,,,,,,,:/:/bin/sh
141 2roottcsh:*:0:0:Super-User running tcsh [cbm]:/:/bin/tcsh
170 1r oot EMpNB8Zp56 0 0 Super-User,,,,,,, / /bin/sh
171 2r oottcsh * 0 0 Super-User running tcsh [cbm] / /bin/tcsh
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DMemRegion.cpp779 std::string Super = FR->getSuperRegion()->getDescriptiveName(false); in getDescriptiveName() local
780 if (Super.empty()) in getDescriptiveName()
782 return QuoteIfNeeded(Super + "." + FR->getDecl()->getName()); in getDescriptiveName()
1301 const TypedValueRegion *Super, in isValidBaseClass() argument
1305 const CXXRecordDecl *Class = Super->getValueType()->getAsCXXRecordDecl(); in isValidBaseClass()
1322 const SubRegion *Super, in getCXXBaseObjectRegion() argument
1324 if (isa<TypedValueRegion>(Super)) { in getCXXBaseObjectRegion()
1325 assert(isValidBaseClass(RD, cast<TypedValueRegion>(Super), IsVirtual)); in getCXXBaseObjectRegion()
1331 while (const auto *Base = dyn_cast<CXXBaseObjectRegion>(Super)) in getCXXBaseObjectRegion()
1332 Super = cast<SubRegion>(Base->getSuperRegion()); in getCXXBaseObjectRegion()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td80 let Super = IP_EXEC;
84 let Super = IP_EXEC;
92 let Super = ALU;
96 let Super = ALU;
106 let Super = DP;
110 let Super = DP;
H A DPPCScheduleP7.td39 let Super = P7_LSU_FXU;
42 let Super = P7_LSU_FXU;
48 let Super = P7_FPU;
51 let Super = P7_FPU;
56 let Super = P7_VMX;
60 let Super = P7_VMX;
/freebsd/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DProgramState.h352 Loc getLValue(const CXXBaseSpecifier &BaseSpec, const SubRegion *Super) const;
355 Loc getLValue(const CXXRecordDecl *BaseClass, const SubRegion *Super,
751 const SubRegion *Super) const { in getLValue() argument
755 Base, Super, BaseSpec.isVirtual())); in getLValue()
759 const SubRegion *Super, in getLValue() argument
763 BaseClass, Super, IsVirtual)); in getLValue()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGNonTrivialStruct.cpp82 using Super = CopiedTypeVisitor<Derived, IsMove>; typedef
103 Super::visitWithKind(PCK, FT, FD, CurStructOffset, in visitWithKind()
286 using Super = DefaultInitializedTypeVisitor<GenDefaultInitializeFuncName>; typedef
297 Super::visitWithKind(PDIK, FT, FD, CurStructOffset); in visitWithKind()
303 using Super = DestructedTypeVisitor<GenDestructorFuncName>; typedef
314 Super::visitWithKind(DK, FT, FD, CurStructOffset); in visitWithKind()
596 using Super = DestructedTypeVisitor<GenDestructor>; typedef
607 Super::visitWithKind(DK, FT, FD, CurStructOffset, Addrs); in visitWithKind()
633 using Super = DefaultInitializedTypeVisitor<GenDefaultInitialize>; typedef
648 Super::visitWithKind(PDIK, FT, FD, CurStructOffset, Addrs); in visitWithKind()
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DTrustNonnullChecker.cpp200 if (const ObjCInterfaceDecl *Super = ID->getSuperClass()) in interfaceHasSuperclass() local
201 return interfaceHasSuperclass(Super, ClassName); in interfaceHasSuperclass()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsScheduleI6400.td32 def I6400IssueLSU : ProcResource<1> { let Super = I6400AGEN; }
33 def I6400IssueALU1 : ProcResource<1> { let Super = I6400AGEN; }
35 def I6400IssueCTU : ProcResource<1> { let Super = I6400CTRL; }
36 def I6400IssueALU0 : ProcResource<1> { let Super = I6400CTRL; }
39 def I6400FPUShort : ProcResource<1> { let Super = I6400FPU; }
40 def I6400FPULong : ProcResource<1> { let Super = I6400FPU; }
H A DMipsScheduleP5600.td33 def P5600IssueALU : ProcResource<1> { let Super = P5600ALQ; }
48 def P5600IssueAL2 : ProcResource<1> { let Super = P5600AGQ; }
49 def P5600IssueCTISTD : ProcResource<1> { let Super = P5600AGQ; }
50 def P5600IssueLDST : ProcResource<1> { let Super = P5600AGQ; }
232 def P5600IssueFPUS : ProcResource<1> { let Super = P5600FPQ; }
233 def P5600IssueFPUL : ProcResource<1> { let Super = P5600FPQ; }
234 def P5600IssueFPULoad : ProcResource<1> { let Super = P5600FPQ; }
H A DMipsScheduleGeneric.td40 def GenericIssueALU : ProcResource<1> { let Super = GenericALU; }
140 def GenericIssueMDU : ProcResource<1> { let Super = GenericALU; }
141 def GenericIssueDIV : ProcResource<1> { let Super = GenericMDU; }
274 def GenericIssueCTISTD : ProcResource<1> { let Super = GenericALU; }
277 def GenericIssueLDST : ProcResource<1> { let Super = GenericLDST; }
436 def GenericIssueCOP0 : ProcResource<1> { let Super = GenericCOP0; }
737 def GenericIssueFPUS : ProcResource<1> { let Super = GenericFPQ; }
738 def GenericIssueFPUL : ProcResource<1> { let Super = GenericFPQ; }
739 def GenericIssueFPULoad : ProcResource<1> { let Super = GenericFPQ; }
740 def GenericIssueFPUStore : ProcResource<1> { let Super = GenericFPQ; }
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedOryon.td67 let Super = ORYONI4FP0;
68 let Super = ORYONFP0I4; }
72 let Super = ORYONI5FP1;
73 let Super = ORYONFP1I5; }
77 let Super = ORYONST0; }
81 let Super = ORYONST0; }
85 let Super = ORYONST1; }
89 let Super = ORYONST1; }
93 let Super = ORYONST0; }
97 let Super = ORYONST1; }
[all …]
H A DAArch64SchedCyclone.td37 let Super = CyUnitI;
43 let Super = CyUnitB;
49 let Super = CyUnitI;
55 let Super = CyUnitBR;
61 let Super = CyUnitB;
80 let Super = CyUnitV;
85 let Super = CyUnitV;
90 let Super = CyUnitVM;
/freebsd/contrib/llvm-project/lldb/source/Plugins/TraceExporter/docs/
H A Dhtr.rst31 A *pass* is applied to a *layer* to extract useful information (summarization) and compress the trace representation into a new *layer*. The idea is to have a series of passes where each pass specializes in extracting certain information about the trace. Some examples of potential passes include: identifying functions, identifying loops, or a more general purpose such as identifying long sequences of instructions that are repeated (i.e. Basic Super Block). Below you will find a description of each pass currently implemented in lldb.
33 **Basic Super Block Reduction**
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-supermicro-x11spi.dts2 // Copyright (c) 2020 Super Micro Computer, Inc

12345