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Searched refs:SubRegRC (Results 1 – 3 of 3) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRewritePartialRegUses.cpp218 auto *SubRegRC = TRI->getSubRegisterClass(RC, OldSubReg); in getRegClassWithShiftedSubregs() local
219 if (!SubRegRC) { in getRegClassWithShiftedSubregs()
223 LLVM_DEBUG(dbgs() << TRI->getRegClassName(SubRegRC) in getRegClassWithShiftedSubregs()
224 << (SubRegRC->isAllocatable() ? "" : " not alloc") in getRegClassWithShiftedSubregs()
229 assert(SubRegRC->isAllocatable()); in getRegClassWithShiftedSubregs()
241 const uint32_t *Mask = NewSubReg ? getSuperRegClassMask(SubRegRC, NewSubReg) in getRegClassWithShiftedSubregs()
242 : SubRegRC->getSubClassMask(); in getRegClassWithShiftedSubregs()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp1035 CodeGenRegisterClass *SubRegRC = nullptr; in getMatchingSubClassWithSubRegs() local
1039 SubRegRC = SuperRegClass; in getMatchingSubClassWithSubRegs()
1051 if (SuperRegRC->getMembers().size() >= SubRegRC->getMembers().size()) in getMatchingSubClassWithSubRegs()
1052 return std::pair(ChosenSuperRegClass, SubRegRC); in getMatchingSubClassWithSubRegs()
1059 return std::pair(ChosenSuperRegClass, SubRegRC); in getMatchingSubClassWithSubRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1058 const TargetRegisterClass *SubRegRC = in selectCopy() local
1060 getSubRegForClass(SubRegRC, TRI, SubReg); in selectCopy()
3106 auto SubRegRC = getRegClassForTypeOnBank(MRI.getType(OldDst), RB); in select() local
3107 RBI.constrainGenericRegister(OldDst, *SubRegRC, MRI); in select()