Searched refs:SrcReg0 (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 432 Register SrcReg0 = MI.getOperand(1).getReg(); in optimizeVectElement() local
453 .addReg(SrcReg0, Src0IsKill) in optimizeVectElement()
465 .addReg(SrcReg0, Src0IsKill) in optimizeVectElement()
|
| H A D | AArch64InstrInfo.cpp | 5449 Register SrcReg0 = SrcReg; in storeRegPairToStackSlot() local
5452 SrcReg0 = TRI.getSubReg(SrcReg, SubIdx0); in storeRegPairToStackSlot()
5458 .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0) in storeRegPairToStackSlot()
7464 Register SrcReg0 = MUL->getOperand(1).getReg(); in genFusedMultiply() local
7482 if (SrcReg0.isVirtual()) in genFusedMultiply()
7483 MRI.constrainRegClass(SrcReg0, RC); in genFusedMultiply()
7492 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()
7498 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()
7504 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()
7529 Register SrcReg0 = MAD->getOperand(1).getReg(); in genFNegatedMAD() local
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1487 Register SrcReg0 = I.getOperand(1).getReg(); in selectMergeValues() local
1490 const LLT SrcTy = MRI.getType(SrcReg0); in selectMergeValues()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 2608 Register SrcReg0 = MI.getOperand(1).getReg(); in applyMappingImpl() local
2622 MRI.setRegClass(SrcReg0, &AMDGPU::SGPR_64RegClass); in applyMappingImpl()
2636 B.buildTrunc(Op0L, SrcReg0); in applyMappingImpl()
|