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Searched refs:Src1SubRC (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp8349 const TargetRegisterClass *Src1SubRC = in splitScalarSMulU64() local
8351 if (RI.isSGPRClass(Src1SubRC)) in splitScalarSMulU64()
8352 Src1SubRC = RI.getEquivalentVGPRClass(Src1SubRC); in splitScalarSMulU64()
8359 buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in splitScalarSMulU64()
8363 buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in splitScalarSMulU64()
8458 const TargetRegisterClass *Src1SubRC = in splitScalarSMulPseudo() local
8460 if (RI.isSGPRClass(Src1SubRC)) in splitScalarSMulPseudo()
8461 Src1SubRC = RI.getEquivalentVGPRClass(Src1SubRC); in splitScalarSMulPseudo()
8468 buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in splitScalarSMulPseudo()
8523 const TargetRegisterClass *Src1SubRC = in splitScalar64BitBinaryOp() local
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H A DSIISelLowering.cpp5420 const TargetRegisterClass *Src1SubRC = in EmitInstrWithCustomInserter() local
5426 MI, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in EmitInstrWithCustomInserter()
5431 MI, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in EmitInstrWithCustomInserter()
5662 const TargetRegisterClass *Src1SubRC = in EmitInstrWithCustomInserter() local
5668 MI, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in EmitInstrWithCustomInserter()
5673 MI, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in EmitInstrWithCustomInserter()