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Searched refs:Src0SubRC (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp8283 const TargetRegisterClass *Src0SubRC = in splitScalar64BitUnaryOp() local
8287 AMDGPU::sub0, Src0SubRC); in splitScalar64BitUnaryOp()
8298 AMDGPU::sub1, Src0SubRC); in splitScalar64BitUnaryOp()
8345 const TargetRegisterClass *Src0SubRC = in splitScalarSMulU64() local
8347 if (RI.isSGPRClass(Src0SubRC)) in splitScalarSMulU64()
8348 Src0SubRC = RI.getEquivalentVGPRClass(Src0SubRC); in splitScalarSMulU64()
8357 buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC, AMDGPU::sub0, Src0SubRC); in splitScalarSMulU64()
8361 buildExtractSubRegOrImm(MII, MRI, Src0, Src0RC, AMDGPU::sub1, Src0SubRC); in splitScalarSMulU64()
8454 const TargetRegisterClass *Src0SubRC = in splitScalarSMulPseudo() local
8456 if (RI.isSGPRClass(Src0SubRC)) in splitScalarSMulPseudo()
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H A DSIISelLowering.cpp5418 const TargetRegisterClass *Src0SubRC = in EmitInstrWithCustomInserter() local
5424 MI, MRI, Src0, Src0RC, AMDGPU::sub0, Src0SubRC); in EmitInstrWithCustomInserter()
5429 MI, MRI, Src0, Src0RC, AMDGPU::sub1, Src0SubRC); in EmitInstrWithCustomInserter()
5660 const TargetRegisterClass *Src0SubRC = in EmitInstrWithCustomInserter() local
5666 MI, MRI, Src0, Src0RC, AMDGPU::sub0, Src0SubRC); in EmitInstrWithCustomInserter()
5671 MI, MRI, Src0, Src0RC, AMDGPU::sub1, Src0SubRC); in EmitInstrWithCustomInserter()