| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MacroFusion.cpp | 23 const MachineInstr &SecondMI, bool CmpOnly) { in isArithmeticBccPair() argument
24 if (SecondMI.getOpcode() != AArch64::Bcc) in isArithmeticBccPair()
72 const MachineInstr &SecondMI) { in isArithmeticCbzPair() argument
73 if (SecondMI.getOpcode() != AArch64::CBZW && in isArithmeticCbzPair()
74 SecondMI.getOpcode() != AArch64::CBZX && in isArithmeticCbzPair()
75 SecondMI.getOpcode() != AArch64::CBNZW && in isArithmeticCbzPair()
76 SecondMI.getOpcode() != AArch64::CBNZX) in isArithmeticCbzPair()
122 const MachineInstr &SecondMI) { in isAESPair() argument
124 switch (SecondMI.getOpcode()) { in isAESPair()
140 const MachineInstr &SecondMI) { in isCryptoEORPair() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMacroFusion.cpp | 70 const MachineInstr &SecondMI, in matchingRegOps() argument
73 const MachineOperand &Op2 = SecondMI.getOperand(SecondMIOpIndex); in matchingRegOps()
93 // Return true if the FirstMI meets the constraints of SecondMI according to
97 const MachineInstr &SecondMI) { in checkOpConstraints() argument
105 const MachineOperand &RA = SecondMI.getOperand(1); in checkOpConstraints()
114 const MachineOperand &RT = SecondMI.getOperand(0); in checkOpConstraints()
122 if (!matchingRegOps(SecondMI, 0, SecondMI, 2) || in checkOpConstraints()
137 const MachineOperand &D = SecondMI.getOperand(1); in checkOpConstraints()
143 if (SecondMI in checkOpConstraints()
237 shouldScheduleAdjacent(const TargetInstrInfo & TII,const TargetSubtargetInfo & TSI,const MachineInstr * FirstMI,const MachineInstr & SecondMI) shouldScheduleAdjacent() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMacroFusion.cpp | |
| H A D | RISCVExpandPseudoInsts.cpp | 581 MachineInstr *SecondMI = in expandAuipcInstPair() local
587 SecondMI->addMemOperand(*MF, *MI.memoperands_begin()); in expandAuipcInstPair()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMMacroFusion.cpp | 23 const MachineInstr &SecondMI) { in isAESPair() argument
25 switch(SecondMI.getOpcode()) { in isAESPair()
39 const MachineInstr &SecondMI) { in isLiteralsPair() argument
42 SecondMI.getOpcode() == ARM::MOVTi16) in isLiteralsPair()
48 /// Check if the instr pair, FirstMI and SecondMI, should be fused
49 /// together. Given SecondMI, when FirstMI is unspecified, then check if
50 /// SecondMI may be part of a fused pair at all.
54 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
57 if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
59 if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI)) in shouldScheduleAdjacent()
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNCreateVOPD.cpp | 47 : FirstMI(First), SecondMI(Second), IsVOPD3(VOPD3) {} in VOPDCombineInfo()
50 MachineInstr *SecondMI; member in __anon4acca4580111::GCNCreateVOPD::VOPDCombineInfo
59 auto *SecondMI = CI.SecondMI; in doReplace() local
61 unsigned Opc2 = SecondMI->getOpcode(); in doReplace()
72 .setMIFlags(FirstMI->getFlags() | SecondMI->getFlags()); in doReplace()
75 MachineInstr *MI[] = {FirstMI, SecondMI}; in doReplace()
77 AMDGPU::getVOPDInstInfo(FirstMI->getDesc(), SecondMI->getDesc()); in doReplace()
121 << *CI.FirstMI << "\tY: " << *CI.SecondMI << "\n"); in doReplace()
152 auto *SecondMI = &*MII; in run() local
154 unsigned Opc2 = SecondMI->getOpcode(); in run()
[all …]
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| H A D | GCNVOPDUtils.cpp | 39 const MachineInstr &SecondMI, bool IsVOPD3) { in checkVOPDRegConstraints() argument
47 if (!IsVOPD3 && (TII.isVOP3(FirstMI) || TII.isVOP3(SecondMI))) in checkVOPDRegConstraints()
49 if (TII.isDPP(FirstMI) || TII.isDPP(SecondMI)) in checkVOPDRegConstraints()
67 if (&*MII == &SecondMI) in checkVOPDRegConstraints()
73 for (const auto &Use : SecondMI.uses()) in checkVOPDRegConstraints()
78 const MachineInstr &MI = (OpcodeIdx == VOPD::X) ? FirstMI : SecondMI; in checkVOPDRegConstraints()
86 AMDGPU::getVOPDInstInfo(FirstMI.getDesc(), SecondMI.getDesc()); in checkVOPDRegConstraints()
89 const MachineInstr &MI = (CompIdx == VOPD::X) ? FirstMI : SecondMI; in checkVOPDRegConstraints()
157 SecondMI.getOpcode() == AMDGPU::V_MOV_B32_e32; in checkVOPDRegConstraints()
166 if (AMDGPU::hasNamedOperand(SecondMI.getOpcode(), AMDGPU::OpName::bitop3)) { in checkVOPDRegConstraints()
[all …]
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| H A D | AMDGPUMacroFusion.cpp | 23 /// Check if the instr pair, FirstMI and SecondMI, should be fused
24 /// together. Given SecondMI, when FirstMI is unspecified, then check if
25 /// SecondMI may be part of a fused pair at all.
29 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
32 switch (SecondMI.getOpcode()) { in shouldScheduleAdjacent()
46 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, in shouldScheduleAdjacent()
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| H A D | GCNVOPDUtils.h | 26 const MachineInstr &SecondMI, bool IsVOPD3);
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetMacroFusion.td | 22 // * const MachineInstr &SecondMI
49 // `firstOpIdx` should be the same as the operand of `SecondMI` at position
67 // The operand of `SecondMI` at position `firstOpIdx` should be the same as the
98 // const MachineInstr &SecondMI) {
99 // auto &MRI = SecondMI.getMF()->getRegInfo();
117 // const MachineInstr &SecondMI) {
118 // auto &MRI = SecondMI.getMF()->getRegInfo();
120 // /* Predicate for `SecondMI` */
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86MacroFusion.cpp | 32 /// Check if the instr pair, FirstMI and SecondMI, should be fused
33 /// together. Given SecondMI, when FirstMI is unspecified, then check if
34 /// SecondMI may be part of a fused pair at all.
38 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
45 const X86::SecondMacroFusionInstKind BranchKind = classifySecond(SecondMI); in shouldScheduleAdjacent()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MacroFusion.cpp | 166 const MachineInstr &SecondMI);
174 const MachineInstr &SecondMI) { in shouldScheduleAdjacent() argument
176 return Predicate(TII, STI, FirstMI, SecondMI); in shouldScheduleAdjacent()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MacroFusion.h | 36 const MachineInstr &SecondMI);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelperCasts.cpp | 233 const MachineInstr &SecondMI, in matchExtOfExt() argument
236 const GExtOp *Second = cast<GExtOp>(&SecondMI); in matchExtOfExt()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandPseudoInsts.cpp | 199 MachineInstr *SecondMI = in expandPcalau12iInstPair() local
205 SecondMI->addMemOperand(*MF, *MI.memoperands_begin()); in expandPcalau12iInstPair()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 978 bool matchExtOfExt(const MachineInstr &FirstMI, const MachineInstr &SecondMI,
|