23                                 const MachineInstr &SecondMI, bool CmpOnly) {  in isArithmeticBccPair()  argument
24   if (SecondMI.getOpcode() != AArch64::Bcc)  in isArithmeticBccPair()
72                                 const MachineInstr &SecondMI) {  in isArithmeticCbzPair()  argument
73   if (SecondMI.getOpcode() != AArch64::CBZW &&  in isArithmeticCbzPair()
74       SecondMI.getOpcode() != AArch64::CBZX &&  in isArithmeticCbzPair()
75       SecondMI.getOpcode() != AArch64::CBNZW &&  in isArithmeticCbzPair()
76       SecondMI.getOpcode() != AArch64::CBNZX)  in isArithmeticCbzPair()
122                       const MachineInstr &SecondMI) {  in isAESPair()  argument
124   switch (SecondMI.getOpcode()) {  in isAESPair()
140                             const MachineInstr &SecondMI) {  in isCryptoEORPair()  argument
141   if (SecondMI.getOpcode() != AArch64::EORv16i8)  in isCryptoEORPair()
162                           const MachineInstr &SecondMI) {  in isAdrpAddPair()  argument
165       SecondMI.getOpcode() == AArch64::ADDXri)  in isAdrpAddPair()
172                            const MachineInstr &SecondMI) {  in isLiteralsPair()  argument
176       (SecondMI.getOpcode() == AArch64::MOVKWi &&  in isLiteralsPair()
177        SecondMI.getOperand(3).getImm() == 16))  in isLiteralsPair()
182      (SecondMI.getOpcode() == AArch64::MOVKXi &&  in isLiteralsPair()
183       SecondMI.getOperand(3).getImm() == 16))  in isLiteralsPair()
190       (SecondMI.getOpcode() == AArch64::MOVKXi &&  in isLiteralsPair()
191        SecondMI.getOperand(3).getImm() == 48))  in isLiteralsPair()
199                               const MachineInstr &SecondMI) {  in isAddressLdStPair()  argument
200   switch (SecondMI.getOpcode()) {  in isAddressLdStPair()
230       return SecondMI.getOperand(2).getImm() == 0;  in isAddressLdStPair()
241                            const MachineInstr &SecondMI) {  in isCCSelectPair()  argument
243   if (SecondMI.getOpcode() == AArch64::CSELWr) {  in isCCSelectPair()
261   if (SecondMI.getOpcode() == AArch64::CSELXr) {  in isCCSelectPair()
284                                   const MachineInstr &SecondMI) {  in isArithmeticLogicPair()  argument
285   if (AArch64InstrInfo::hasShiftedReg(SecondMI))  in isArithmeticLogicPair()
288   switch (SecondMI.getOpcode()) {  in isArithmeticLogicPair()
384                                         const MachineInstr &SecondMI) {  in isAddSub2RegAndConstOnePair()  argument
388   switch (SecondMI.getOpcode()) {  in isAddSub2RegAndConstOnePair()
402   if (!SecondMI.getOperand(2).isImm() || SecondMI.getOperand(2).getImm() != 1) {  in isAddSub2RegAndConstOnePair()
446                                    const MachineInstr &SecondMI) {  in shouldScheduleAdjacent()  argument
453     if (isArithmeticBccPair(FirstMI, SecondMI, CmpOnly))  in shouldScheduleAdjacent()
456   if (ST.hasArithmeticCbzFusion() && isArithmeticCbzPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
458   if (ST.hasFuseAES() && isAESPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
460   if (ST.hasFuseCryptoEOR() && isCryptoEORPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
462   if (ST.hasFuseAdrpAdd() && isAdrpAddPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
464   if (ST.hasFuseLiterals() && isLiteralsPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
466   if (ST.hasFuseAddress() && isAddressLdStPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
468   if (ST.hasFuseCCSelect() && isCCSelectPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
470   if (ST.hasFuseArithmeticLogic() && isArithmeticLogicPair(FirstMI, SecondMI))  in shouldScheduleAdjacent()
473       isAddSub2RegAndConstOnePair(FirstMI, SecondMI))  in shouldScheduleAdjacent()