| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 37 return EnableSchedModel && SchedModel.hasInstrSchedModel(); in hasInstrSchedModel()
47 SchedModel = TSInfo->getSchedModel(); in init()
54 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init()
56 ResourceLCM = SchedModel.IssueWidth; in init()
58 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; in init()
62 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
64 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; in init()
121 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
132 SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
175 const unsigned DefaultDefLatency = TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
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| H A D | MachineScheduler.cpp | 1240 if (!SchedModel.hasInstrSchedModel()) in dumpScheduleTraceTopDown()
1256 for (TargetSchedModel::ProcResIter PI = SchedModel.getWriteProcResBegin(SC), in dumpScheduleTraceTopDown()
1257 PE = SchedModel.getWriteProcResEnd(SC); in dumpScheduleTraceTopDown()
1289 make_range(SchedModel.getWriteProcResBegin(SC), in dumpScheduleTraceTopDown()
1290 SchedModel.getWriteProcResEnd(SC))); in dumpScheduleTraceTopDown()
1303 SchedModel.getResourceName(PI.ProcResourceIdx); in dumpScheduleTraceTopDown()
1321 if (!SchedModel.hasInstrSchedModel()) in dumpScheduleTraceBottomUp()
1338 for (TargetSchedModel::ProcResIter PI = SchedModel.getWriteProcResBegin(SC), in dumpScheduleTraceBottomUp()
1339 PE = SchedModel.getWriteProcResEnd(SC); in dumpScheduleTraceBottomUp()
1370 make_range(SchedModel.getWriteProcResBegin(SC), in dumpScheduleTraceBottomUp()
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| H A D | MachineTraceMetrics.cpp | 82 SchedModel.init(&ST); in init()
85 SchedModel.getNumProcResourceKinds()); in init()
122 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getResources()
133 if (!SchedModel.hasInstrSchedModel()) in getResources()
135 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); in getResources()
140 PI = SchedModel.getWriteProcResBegin(SC), in getResources()
141 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { in getResources()
152 PRCycles[K] * SchedModel.getResourceFactor(K); in getResources()
161 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getProcReleaseAtCycles()
173 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in Ensemble()
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| H A D | VLIWMachineScheduler.cpp | 67 : TII(STI.getInstrInfo()), SchedModel(SM) { in VLIWResourceModel()
74 Packet.reserve(SchedModel->getIssueWidth()); in VLIWResourceModel()
156 Packet.size() >= SchedModel->getIssueWidth()) { in reserveResources()
272 SchedModel = DAG->getSchedModel(); in initialize()
274 Top.init(DAG, SchedModel); in initialize()
275 Bot.init(DAG, SchedModel); in initialize()
303 const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const { in createVLIWResourceModel()
304 return new VLIWResourceModel(STI, SchedModel); in createVLIWResourceModel()
362 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
363 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
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| H A D | ScheduleDAGInstrs.cpp | 132 SchedModel.init(&ST, EnableSchedModel, EnableSchedItins); in ScheduleDAGInstrs()
301 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, in addPhysRegDataDeps()
306 ST.adjustSchedDependency(SU, OperIdx, UseSU, UseOpIdx, Dep, &SchedModel); in addPhysRegDataDeps()
345 SchedModel.computeOutputLatency(MI, OperIdx, DefInstr)); in addPhysRegDeps()
348 &SchedModel); in addPhysRegDeps()
476 Dep.setLatency(SchedModel.computeOperandLatency(MI, OperIdx, Use, in addVRegDefDeps()
479 &SchedModel); in addVRegDefDeps()
521 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
609 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
619 if (SchedModel.hasInstrSchedModel()) { in initSUnits()
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| H A D | EarlyIfConversion.cpp | 806 MCSchedModel SchedModel; member in __anon4c5015260311::EarlyIfConverter
967 unsigned CritLimit = SchedModel.MispredictPenalty/2; in shouldConvertIf()
1140 SchedModel = STI.getSchedModel(); in run()
1198 TargetSchedModel SchedModel; member in __anon4c5015260b11::EarlyIfPredicator
1250 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1264 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1270 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1306 SchedModel.init(&STI); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetSchedule.h | 34 MCSchedModel SchedModel; variable
60 TargetSchedModel() : SchedModel(MCSchedModel::Default) {} in TargetSchedModel()
87 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } in getMCSchedModel()
108 unsigned getProcessorID() const { return SchedModel.getProcessorID(); } in getProcessorID()
111 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
126 return SchedModel.getNumProcResourceKinds(); in getNumProcResourceKinds()
131 return SchedModel.getProcResource(PIdx); in getProcResource()
138 return SchedModel.getProcResource(PIdx)->Name; in getResourceName()
173 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } in getMicroOpBufferSize()
178 return SchedModel.getProcResource(PIdx)->BufferSize; in getResourceBufferSize()
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| H A D | VLIWMachineScheduler.h | 40 const TargetSchedModel *SchedModel; variable
129 const TargetSchedModel *SchedModel = nullptr; member
160 SchedModel = smodel; in init()
169 CriticalPathLength = BBSize / SchedModel->getIssueWidth(); in init()
212 const TargetSchedModel *SchedModel = nullptr;
246 const TargetSchedModel *SchedModel) const;
211 const TargetSchedModel *SchedModel = nullptr; global() variable
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| H A D | ScheduleDAGInstrs.h | 122 TargetSchedModel SchedModel; variable
283 const TargetSchedModel *getSchedModel() const { return &SchedModel; } in getSchedModel()
287 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) in getSchedClass()
288 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); in getSchedClass()
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| H A D | MachineScheduler.h | 619 LLVM_ABI void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
850 const TargetSchedModel *SchedModel = nullptr; variable
996 return RetiredMOps * SchedModel->getMicroOpFactor(); in getCriticalCount()
1004 return std::max(CurrCycle * SchedModel->getLatencyFactor(), in getExecutedCount()
1026 return SchedModel->getProcResource(PIdx)->SubUnitsIdxBegin && in isUnbufferedGroup()
1027 !SchedModel->getProcResource(PIdx)->BufferSize; in isUnbufferedGroup()
1184 const TargetSchedModel *SchedModel);
1189 const TargetSchedModel *SchedModel = nullptr; variable
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| H A D | TargetSubtargetInfo.h | 147 const TargetSchedModel *SchedModel) const { in resolveSchedClass() argument
253 const TargetSchedModel *SchedModel) const { in adjustSchedDependency() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZHazardRecognizer.cpp | 152 for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i) in nextGroup()
176 PI = SchedModel->getWriteProcResBegin(SC), in dumpSU()
177 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in dumpSU()
179 *SchedModel->getProcResource(PI->ProcResourceIdx); in dumpSU()
226 for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i) in dumpProcResourceCounters()
236 for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i) in dumpProcResourceCounters()
238 dbgs() << SchedModel->getProcResource(i)->Name in dumpProcResourceCounters()
244 << SchedModel->getProcResource(CriticalResourceIdx)->Name in dumpProcResourceCounters()
260 ProcResourceCounters.assign(SchedModel->getNumProcResourceKinds(), 0); in clearProcResCounters()
297 PI = SchedModel in EmitInstruction()
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| H A D | SystemZHazardRecognizer.h | 48 const TargetSchedModel *SchedModel; variable
112 : TII(tii), SchedModel(SM) { in SystemZHazardRecognizer()
122 if (!SU->SchedClass && SchedModel->hasInstrSchedModel()) in getSchedClass()
123 SU->SchedClass = SchedModel->resolveSchedClass(SU->getInstr()); in getSchedClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StorePairSuppress.cpp | 35 TargetSchedModel SchedModel; member in __anondab15a050111::AArch64StorePairSuppress
86 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
90 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx2); in shouldAddSTPToBlock()
139 SchedModel.init(&ST); in runOnMachineFunction()
145 if (!SchedModel.hasInstrSchedModel()) { in runOnMachineFunction()
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| H A D | AArch64SIMDInstrOpt.cpp | 72 TargetSchedModel SchedModel; member
221 std::string Subtarget = std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldReplaceInst()
229 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst()
241 SCDescRepl = SchedModel.getMCSchedModel()->getSchedClassDesc( in shouldReplaceInst()
253 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode()); in shouldReplaceInst()
255 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
292 std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldExitEarly()
704 SchedModel.init(&ST); in runOnMachineFunction()
705 if (!SchedModel.hasInstrSchedModel()) in runOnMachineFunction()
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| H A D | AArch64SchedKryo.td | 41 let SchedModel = KryoModel in {
60 let SchedModel = KryoModel in {
141 } // SchedModel = KryoModel
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SISchedule.td | 15 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
216 let SchedModel = SIFullSpeedModel in {
232 } // End SchedModel = SIFullSpeedModel
234 let SchedModel = SIQuarterSpeedModel in {
254 } // End SchedModel = SIQuarterSpeedModel
256 let SchedModel = SIDPFullSpeedModel in {
278 } // End SchedModel = SIDPFullSpeedModel
280 let SchedModel = SIDPGFX942FullSpeedModel in {
312 } // End SchedModel = SIDPGFX942FullSpeedModel
315 let SchedModel = SIDPGFX950FullSpeedModel in {
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| H A D | SIPreEmitPeephole.cpp | 312 const TargetSchedModel &SchedModel; member in __anona59f01570311::BranchWeightCostModel
321 : TII(TII), SchedModel(TII.getSchedModel()) { in BranchWeightCostModel()
329 BranchTakenCost = SchedModel.computeInstrLatency(&Branch); in BranchWeightCostModel()
336 ThenCyclesCost += SchedModel.computeInstrLatency(&MI); in isProfitable()
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| H A D | AMDGPUInsertDelayAlu.cpp | 31 const TargetSchedModel *SchedModel; member in __anon39c000570111::AMDGPUInsertDelayAlu
426 unsigned Latency = SchedModel->computeOperandLatency( in runOnMachineBasicBlock()
465 SchedModel = &SII->getSchedModel(); in run()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSchedule.td | 185 // SchedModel ties these units to a processor for any stand-alone defs
192 SchedMachineModel SchedModel = ?;
202 SchedMachineModel SchedModel = ?;
240 // SchedModel silences warnings but is ignored.
244 SchedMachineModel SchedModel = ?;
249 // SchedModel ties these resources to a processor.
274 SchedMachineModel SchedModel = ?;
316 // type at the same time. This class is unaware of its SchedModel so
323 // SchedModel ties these resources to a processor.
334 SchedMachineModel SchedModel = ?;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 112 MCSchedModel SchedModel =
123 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F), in InstrItineraryData()
124 Itineraries(SchedModel.InstrItineraries) {}
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonMachineScheduler.cpp | 41 const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const { in createVLIWResourceModel()
42 return new HexagonVLIWResourceModel(STI, SchedModel); in createVLIWResourceModel()
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| H A D | HexagonMachineScheduler.h | 35 const TargetSchedModel *SchedModel) const override;
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 349 assert(CPUEntry->SchedModel && "Missing processor SchedModel value"); in getSchedModelForCPU()
350 return *CPUEntry->SchedModel; in getSchedModelForCPU()
355 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
356 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSchedSyntacoreSCR345.td | 281 let SchedModel = SyntacoreSCR3RV32Model in {
306 let SchedModel = SyntacoreSCR3RV64Model in {
334 let SchedModel = SyntacoreSCR4RV32Model in {
364 let SchedModel = SyntacoreSCR4RV64Model in {
397 let SchedModel = SyntacoreSCR5RV32Model in {
427 let SchedModel = SyntacoreSCR5RV64Model in {
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