Home
last modified time | relevance | path

Searched refs:Scaled (Results 1 – 23 of 23) sorted by relevance

/freebsd/contrib/llvm-project/llvm/tools/llvm-xray/
H A Dxray-color-helper.cpp85 double Scaled[3] = {std::get<0>(Color) / 255.0, std::get<1>(Color) / 255.0, in convertToHSV() local
90 if (Scaled[i] < Scaled[Min]) in convertToHSV()
92 if (Scaled[i] > Scaled[Max]) in convertToHSV()
96 double C = Scaled[Max] - Scaled[Min]; in convertToHSV()
99 (C == 0) ? 0 : (Scaled[(Max + 1) % 3] - Scaled[(Max + 2) % 3]) / C; in convertToHSV()
104 double V = Scaled[Max]; in convertToHSV()
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DInstrumentation.h187 uint64_t Scaled = Count / Scale; in scaleBranchCount() local
188 assert(Scaled <= std::numeric_limits<uint32_t>::max() && "overflow 32-bits"); in scaleBranchCount()
189 return Scaled; in scaleBranchCount()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DBlockFrequencyInfoImpl.cpp503 Scaled64 Scaled = BFI.Freqs[Index].Scaled * ScalingFactor; in convertFloatingToInteger() local
504 BFI.Freqs[Index].Integer = std::max(UINT64_C(1), Scaled.toInt<uint64_t>()); in convertFloatingToInteger()
506 << BFI.Freqs[Index].Scaled << ", scaled = " << Scaled in convertFloatingToInteger()
529 : BFI.Freqs[N.Index].Scaled; in unwrapLoop()
540 Freqs[Index].Scaled = Working[Index].Mass.toScaled(); in unwrapLoops()
553 Min = std::min(Min, Freqs[Index].Scaled); in finalizeMetrics()
554 Max = std::max(Max, Freqs[Index].Scaled); in finalizeMetrics()
617 return Freqs[Node.Index].Scaled; in getFloatingBlockFreq()
H A DLoopAccessAnalysis.cpp1121 const SCEV *Scaled = in findForkedSCEVs() local
1123 ScevList.emplace_back(SE->getAddExpr(Base, Scaled), NeedsFreeze); in findForkedSCEVs()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleV6.td108 // Scaled register offset, issues over 2 cycles
121 // Scaled register offset with update, issues over 2 cycles
161 // Scaled register offset, issues over 2 cycles
174 // Scaled register offset with update, issues over 2 cycles
H A DARMScheduleA8.td123 // Scaled register offset, issues over 2 cycles
144 // Scaled register offset with update, issues over 2 cycles
202 // Scaled register offset, issues over 2 cycles
222 // Scaled register offset with update, issues over 2 cycles
H A DARMScheduleA9.td226 // Scaled register offset
267 // Scaled register offset with update
366 // Scaled register offset
403 // Scaled register offset with update
H A DARMInstrThumb.td88 // Scaled 4 immediate.
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineTraceMetrics.h433 unsigned getCycles(unsigned Scaled) { in getCycles() argument
435 return (Scaled + Factor - 1) / Factor; in getCycles()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DSpillPlacement.cpp286 uint64_t Scaled = (Freq >> 13) + bool(Freq & (1 << 12)); in setThreshold() local
287 Threshold = BlockFrequency(std::max(UINT64_C(1), Scaled)); in setThreshold()
/freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXILResourceAccess.cpp41 APInt Scaled = ConstantOffset.udiv(ScalarSize); in calculateGEPOffset() local
42 return ConstantInt::get(Type::getInt32Ty(GEP->getContext()), Scaled); in calculateGEPOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOP3PInstructions.td830 class MAIFrag<SDPatternOperator Op, code pred, bit HasAbid = true, bit Scaled = false> : PatFrag <
831 !if(Scaled, (ops node:$src0, node:$src1, node:$src2, node:$cbsz, node:$blgp,
837 …!if(Scaled, (Op $src0, $src1, $src2, $cbsz, $blgp, $src0_modifiers, $scale_src0, $src1_modifiers, …
860 bit Scaled = false> :
861 MAIFrag<Op, MayNeedAGPRs, HasAbid, Scaled> {
866 bit Scaled = false> :
867 MAIFrag<Op, MayNotNeedAGPRs, HasAbid, Scaled> {
878 class MAIInst<string OpName, VOPProfile P, SDPatternOperator node, bit Scaled = false>
879 : VOP3InstBase<OpName, P, node, /*IsVOP2=*/0, Scaled> {
893 MAIInst<OpName, BaseInst.Pfl, node, /*Scaled=*/true> {
[all …]
H A DAMDGPUCodeGenPrepare.cpp857 Value *Scaled = Builder.CreateCall(getLdexpF32(), {Src, InputScaleFactor}); in emitSqrtIEEE2ULP() local
859 Value *Sqrt = Builder.CreateCall(getSqrtF32(), Scaled); in emitSqrtIEEE2ULP()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp896 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; in print_details() local
897 OS << ", " << Signed << " " << Scaled << " offset"; in print_details()
908 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; in print_details() local
909 OS << ", " << Signed << " " << Scaled << " offset"; in print_details()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp35 Scaled = 3 enumerator
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DBlockFrequencyInfoImpl.h213 Scaled64 Scaled; member
1408 Freqs[Node.Index].Scaled = Freq[It->second];
1410 Freqs[Node.Index].Scaled = Scaled64::getZero();
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCodeGenPGO.cpp1462 uint64_t Scaled = Weight / Scale + 1; in scaleBranchWeight() local
1463 assert(Scaled <= UINT32_MAX && "overflow 32-bits"); in scaleBranchWeight()
1464 return Scaled; in scaleBranchWeight()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp4803 unsigned Scaled = Log2SEW + (DestEEW - 1); in getDestLog2EEW() local
4804 assert(Scaled >= 3 && Scaled <= 6); in getDestLog2EEW()
4805 return Scaled; in getDestLog2EEW()
H A DRISCVFeatures.td1566 "Qualcomm uC Scaled Load Store Extension">;
1570 "'Xqcisls' (Qualcomm uC Scaled Load Store Extension)">;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td5314 // Scaled half-precision to 32-bit
5324 // Scaled half-precision to 64-bit
5333 // Scaled single-precision to 32-bit
5342 // Scaled single-precision to 64-bit
5350 // Scaled double-precision to 32-bit
5359 // Scaled double-precision to 64-bit
5444 // Scaled
H A DAArch64InstrInfo.td4203 // Scaled
5111 // Scaled floating point to integer conversion instructions.
5295 // Scaled integer to floating point conversion instructions.
H A DAArch64ISelLowering.cpp23356 const bool Scaled = Opc == AArch64ISD::GLD1_SCALED_MERGE_ZERO || in performGLD1Combine() local
23392 unsigned NewOpc = getGatherVecOpcode(Scaled, OffsetIsSExt, true); in performGLD1Combine()
/freebsd/share/misc/
H A Dusb_vendors17029 6570 Iowa Scaled Engineering, LLC CKT-AVRPROGRAMMER