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Searched refs:Scaled (Results 1 – 18 of 18) sorted by relevance

/freebsd/contrib/llvm-project/llvm/tools/llvm-xray/
H A Dxray-color-helper.cpp85 double Scaled[3] = {std::get<0>(Color) / 255.0, std::get<1>(Color) / 255.0, in convertToHSV() local
90 if (Scaled[i] < Scaled[Min]) in convertToHSV()
92 if (Scaled[i] > Scaled[Max]) in convertToHSV()
96 double C = Scaled[Max] - Scaled[Min]; in convertToHSV()
99 (C == 0) ? 0 : (Scaled[(Max + 1) % 3] - Scaled[(Max + 2) % 3]) / C; in convertToHSV()
104 double V = Scaled[Max]; in convertToHSV()
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/
H A DInstrumentation.h179 uint64_t Scaled = Count / Scale; in scaleBranchCount() local
180 assert(Scaled <= std::numeric_limits<uint32_t>::max() && "overflow 32-bits"); in scaleBranchCount()
181 return Scaled; in scaleBranchCount()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DBlockFrequencyInfoImpl.cpp503 Scaled64 Scaled = BFI.Freqs[Index].Scaled * ScalingFactor; in convertFloatingToInteger() local
504 BFI.Freqs[Index].Integer = std::max(UINT64_C(1), Scaled.toInt<uint64_t>()); in convertFloatingToInteger()
506 << BFI.Freqs[Index].Scaled << ", scaled = " << Scaled in convertFloatingToInteger()
529 : BFI.Freqs[N.Index].Scaled; in unwrapLoop()
540 Freqs[Index].Scaled = Working[Index].Mass.toScaled(); in unwrapLoops()
553 Min = std::min(Min, Freqs[Index].Scaled); in finalizeMetrics()
554 Max = std::max(Max, Freqs[Index].Scaled); in finalizeMetrics()
617 return Freqs[Node.Index].Scaled; in getFloatingBlockFreq()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleV6.td108 // Scaled register offset, issues over 2 cycles
121 // Scaled register offset with update, issues over 2 cycles
161 // Scaled register offset, issues over 2 cycles
174 // Scaled register offset with update, issues over 2 cycles
H A DARMScheduleA8.td123 // Scaled register offset, issues over 2 cycles
144 // Scaled register offset with update, issues over 2 cycles
202 // Scaled register offset, issues over 2 cycles
222 // Scaled register offset with update, issues over 2 cycles
H A DARMScheduleA9.td226 // Scaled register offset
267 // Scaled register offset with update
366 // Scaled register offset
403 // Scaled register offset with update
H A DARMInstrThumb.td89 // Scaled 4 immediate.
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineTraceMetrics.h420 unsigned getCycles(unsigned Scaled) { in getCycles() argument
422 return (Scaled + Factor - 1) / Factor; in getCycles()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DSpillPlacement.cpp254 uint64_t Scaled = (Freq >> 13) + bool(Freq & (1 << 12)); in setThreshold() local
255 Threshold = BlockFrequency(std::max(UINT64_C(1), Scaled)); in setThreshold()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp851 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; in print_details() local
852 OS << ", " << Signed << " " << Scaled << " offset"; in print_details()
863 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; in print_details() local
864 OS << ", " << Signed << " " << Scaled << " offset"; in print_details()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp35 Scaled = 3 enumerator
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCodeGenPGO.cpp1448 uint64_t Scaled = Weight / Scale + 1; in scaleBranchWeight() local
1449 assert(Scaled <= UINT32_MAX && "overflow 32-bits"); in scaleBranchWeight()
1450 return Scaled; in scaleBranchWeight()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DBlockFrequencyInfoImpl.h216 Scaled64 Scaled; member
1413 Freqs[Node.Index].Scaled = Freq[BlockIndex[&BB]];
1415 Freqs[Node.Index].Scaled = Scaled64::getZero();
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCodeGenPrepare.cpp853 Value *Scaled = Builder.CreateCall(getLdexpF32(), {Src, InputScaleFactor}); in emitSqrtIEEE2ULP() local
855 Value *Sqrt = Builder.CreateCall(getSqrtF32(), Scaled); in emitSqrtIEEE2ULP()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td4998 // Scaled half-precision to 32-bit
5008 // Scaled half-precision to 64-bit
5017 // Scaled single-precision to 32-bit
5026 // Scaled single-precision to 64-bit
5034 // Scaled double-precision to 32-bit
5043 // Scaled double-precision to 64-bit
5126 // Scaled
H A DAArch64InstrInfo.td3888 // Scaled
4693 // Scaled floating point to integer conversion instructions.
4834 // Scaled integer to floating point conversion instructions.
H A DAArch64ISelLowering.cpp22325 const bool Scaled = Opc == AArch64ISD::GLD1_SCALED_MERGE_ZERO || in performGLD1Combine() local
22361 unsigned NewOpc = getGatherVecOpcode(Scaled, OffsetIsSExt, true); in performGLD1Combine()
/freebsd/share/misc/
H A Dusb_vendors16971 6570 Iowa Scaled Engineering, LLC CKT-AVRPROGRAMMER