| /freebsd/contrib/arm-optimized-routines/ |
| H A D | Makefile | 13 SUBS = math string networking macro
44 $(foreach sub,$(SUBS),$(eval include $(srcdir)/$(sub)/Dir.mk))
56 all: $(SUBS:%=all-%)
58 ALL_FILES = $(foreach sub,$(SUBS),$($(sub)-files))
78 clean: $(SUBS:%=clean-%)
96 install: $(SUBS:%=install-%)
98 check: $(SUBS:%=check-%)
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| H A D | config.mk.dist | 7 SUBS = math string networking
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedOryon.td | 683 (instregex "^ADDS(W|X)r(i|r|x)(64)?", "^SUBS(W|X)r(i|r|x)")>;
687 (instregex "^ADDS(W|X)rs", "^SUBS(W|X)rs")>;
708 // CMP is an alias of SUBS as above
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| H A D | AArch64SchedKryoDetails.td | 2189 (instregex "SUBS?(W|X)ri")>;
2195 (instregex "SUBS?(W|X)rx")>;
2201 (instregex "SUBS?(W|X)rs")>;
2207 (instregex "SUBS?(W|X)rr")>;
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| H A D | AArch64SchedThunderX2T99.td | 432 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
454 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
473 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
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| H A D | AArch64SchedThunderX3T110.td | 692 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
714 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
733 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
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| H A D | AArch64ISelLowering.h | 172 SUBS, enumerator
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| H A D | AArch64SchedA64FX.td | 608 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
628 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
645 "SUBS?(W|X)r(i|r|s|x)", "SBC(W|X)r",
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| H A D | AArch64ISelLowering.cpp | 2605 MAKE_CASE(AArch64ISD::SUBS) in getTargetNodeName()
3474 unsigned Opcode = AArch64ISD::SUBS; in emitComparison()
3995 Opc = AArch64ISD::SUBS; in getAArch64XALUOOp()
3999 Opc = AArch64ISD::SUBS; in getAArch64XALUOOp()
4021 DAG.getNode(AArch64ISD::SUBS, DL, VTs, Mul, SExtMul).getValue(1); in getAArch64XALUOOp()
4040 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp()
4046 DAG.getNode(AArch64ISD::SUBS, DL, VTs, in getAArch64XALUOOp()
4157 DAG.getNode(AArch64ISD::SUBS, DL, DAG.getVTList(VT, MVT::Glue), Op0, Op1); in valueToCarryFlag()
6604 DAG.getNode(AArch64ISD::SUBS, DL, DAG.getVTList(VT, MVT::i32), in LowerABS()
18006 SDValue Negs = DAG.getNode(AArch64ISD::SUBS, DL, VTs, Zero, N0); in BuildSREMPow2()
[all …]
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| H A D | AArch64SchedTSV110.td | 58 // 1cyc_1BRU: ADDS, ADCS, ANDS, BICS, SUBS, SBCS, CCMN, CCMP
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| H A D | AArch64InstrInfo.td | 714 def AArch64sub_flag : SDNode<"AArch64ISD::SUBS", SDTBinaryArithWithFlagsOut>;
2304 defm SUBS : AddSubS<1, "subs", AArch64sub_flag, "cmp", "adds", "cmn">;
2311 // Use SUBS instead of SUB to enable CSE between SUBS and SUB.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 326 (instregex "t2(ADC|ADDS|ADD|BIC|EOR|ORN|ORR|RSBS|RSB|SBC|SUBS)rs$",
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| H A D | ARMInstrThumb2.td | 4266 // B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.
4279 // B9.3.19 SUBS PC, LR (Thumb)
4281 // for SUBS{<c>}{<q>} PC, LR, #0.
4286 // B9.3.3, B9.3.20: ERET is an alias for "SUBS PC, LR, #0" in an implementation that
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| H A D | ARMInstrInfo.td | 3869 // Currently, ADDS/SUBS are pseudo opcodes that exist only in the
3874 // FIXME: Eliminate ADDS/SUBS pseudo opcodes after adding tablegen
3879 defm SUBS : AsI1_bin_s_irs<IIC_iALUi, IIC_iALUr, IIC_iALUsr, ARMsubc>;
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| /freebsd/crypto/heimdal/lib/wind/ |
| H A D | NormalizationTest.txt | 7995 C22A;C22A;1109 116E 11B9;C22A;1109 116E 11B9; # (숪; 숪; 숪; 숪; 숪; ) HANGUL SYLLABLE SUBS
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