Home
last modified time | relevance | path

Searched refs:SPR (Results 1 – 25 of 27) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrVFP.td172 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
174 [(set SPR:$Sd, (alignedload32 addrmode5:$addr))]>,
207 def VSTRS : ASI5<0b1101, 0b00, (outs), (ins SPR:$Sd, addrmode5:$addr),
209 [(alignedstore32 SPR:$Sd, addrmode5:$addr)]>,
447 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
449 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]>,
472 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
474 [(set SPR:$Sd, (fsub SPR:$Sn, SPR:$Sm))]>,
497 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm),
499 [(set SPR:$Sd, (fdiv SPR:$Sn, SPR:$Sm))]>,
[all …]
H A DARMInstrCDE.td487 def cde_vcx_s_regs : CDE_VCX_RegisterOperandsTemplate<SPR>;
550 def : Pat<(f32 (int_arm_cde_vcx1a timm:$coproc, (f32 SPR:$acc), timm:$imm)),
551 (f32 (CDE_VCX1A_fpsp p_imm:$coproc, SPR:$acc, imm_11b:$imm))>;
557 def : Pat<(f32 (int_arm_cde_vcx2 timm:$coproc, (f32 SPR:$n), timm:$imm)),
558 (f32 (CDE_VCX2_fpsp p_imm:$coproc, SPR:$n, imm_6b:$imm))>;
559 def : Pat<(f32 (int_arm_cde_vcx2a timm:$coproc, (f32 SPR:$acc), (f32 SPR:$n),
561 (f32 (CDE_VCX2A_fpsp p_imm:$coproc, SPR:$acc, SPR:$n, imm_6b:$imm))>;
568 def : Pat<(f32 (int_arm_cde_vcx3 timm:$coproc, (f32 SPR:$n), (f32 SPR:$m),
570 (f32 (CDE_VCX3_fpsp p_imm:$coproc, (f32 SPR:$n), (f32 SPR:$m),
572 def : Pat<(f32 (int_arm_cde_vcx3a timm:$coproc, (f32 SPR:$acc), (f32 SPR:$n),
[all …]
H A DARMRegisterInfo.td431 def SPR : RegisterClass<"ARM", [f32], 32, (sequence "S%u", 0, 31)> {
432 let AltOrders = [(add (decimate SPR, 2), SPR),
433 (add (decimate SPR, 4),
434 (decimate SPR, 2),
435 (decimate (rotl SPR, 1), 4),
436 (decimate (rotl SPR, 1), 2))];
444 let AltOrders = [(add (decimate HPR, 2), SPR),
455 // Subset of SPR which can be used as a source of NEON scalars for 16-bit
480 def FPWithVPR : RegisterClass<"ARM", [f32], 32, (add SPR, DPR, VPR)> {
485 // 32-bit SPR subregs).
[all …]
H A DARMRegisterBanks.td13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
H A DARMInstrNEON.td4377 def : Pat<(v2f32 (fmul DPR:$Rn, (ARMvdup (f32 SPR:$Rm)))),
4379 (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$Rm, ssub_0),
4385 def : Pat<(v4f32 (fmul QPR:$Rn, (ARMvdup (f32 SPR:$Rm)))),
4387 (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$Rm, ssub_0),
5257 (ins SPR:$Vn, SPR_8:$Vm, VectorIndex32:$idx),
5278 def VFMALD : N3VCP8F16Q0<"vfmal", DPR, SPR, SPR, 0b00, 0b10, 1>;
5279 def VFMSLD : N3VCP8F16Q0<"vfmsl", DPR, SPR, SPR, 0b01, 0b10, 1>;
6579 def : Pat<(v2f32 (insertelt DPR:$src1, SPR:$src2, imm:$src3)),
6581 SPR:$src2, (SSubReg_f32_reg imm:$src3))>;
6582 def : Pat<(v4f32 (insertelt QPR:$src1, SPR:$src2, imm:$src3)),
[all …]
H A DARMInstrMVE.td882 f32, SPR>;
1905 (COPY_TO_REGCLASS (f32 (EXTRACT_SUBREG MQPR:$src, (SSubReg_f32_reg imm:$lane))), SPR)>;
1906 def : Pat<(insertelt (v4f32 MQPR:$src1), (f32 SPR:$src2), imm:$lane),
1907 …(INSERT_SUBREG (v4f32 (COPY_TO_REGCLASS MQPR:$src1, MQPR)), SPR:$src2, (SSubReg_f32_reg imm:$lane)…
1915 (COPY_TO_REGCLASS HPR:$src2, SPR)),
1929 def : Pat<(v4f32 (scalar_to_vector SPR:$src)),
1930 (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), SPR:$src, ssub_0)>;
/freebsd/contrib/llvm-project/llvm/lib/ProfileData/
H A DPGOCtxProfWriter.cpp244 static void mapping(yaml::IO &IO, SerializableProfileRepresentation &SPR) { in mapping()
245 IO.mapOptional("Contexts", SPR.Contexts); in mapping()
246 IO.mapOptional("FlatProfiles", SPR.FlatProfiles); in mapping()
260 SerializableProfileRepresentation SPR; in createCtxProfFromYAML() local
261 In >> SPR; in createCtxProfFromYAML()
270 if (!SPR.Contexts.empty()) { in createCtxProfFromYAML()
272 for (const auto &DC : SPR.Contexts) { in createCtxProfFromYAML()
289 if (!SPR.FlatProfiles.empty()) { in createCtxProfFromYAML()
291 for (const auto &[Guid, Counters] : SPR.FlatProfiles) in createCtxProfFromYAML()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td54 // SPR - One of the 32-bit special-purpose registers
55 class SPR<bits<10> num, string n> : PPCReg<n> {
291 def LR : SPR<8, "lr">, DwarfRegNum<[-2, 65]>;
292 def LR8 : SPR<8, "lr">, DwarfRegNum<[65, -2]> {
297 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>;
298 def CTR8 : SPR<9, "ctr">, DwarfRegNum<[66, -2]> {
303 def VRSAVE: SPR<256, "vrsave">, DwarfRegNum<[109]>;
306 def SPEFSCR: SPR<512, "spefscr">, DwarfRegNum<[612, 112]>;
308 def XER: SPR<1, "xer">, DwarfRegNum<[76]>;
311 // (which really is SPR register 1); this is the only bit interesting to a
[all …]
H A DPPCInstrFormats.td1699 bits<10> SPR;
1702 let Inst{11} = SPR{4};
1703 let Inst{12} = SPR{3};
1704 let Inst{13} = SPR{2};
1705 let Inst{14} = SPR{1};
1706 let Inst{15} = SPR{0};
1707 let Inst{16} = SPR{9};
1708 let Inst{17} = SPR{8};
1709 let Inst{18} = SPR{7};
1710 let Inst{19} = SPR{6};
[all …]
H A DPPCInstr64Bit.td530 def MFSPR8 : XFXForm_1<31, 339, (outs g8rc:$RST), (ins i32imm:$SPR),
531 "mfspr $RST, $SPR", IIC_SprMFSPR>;
532 def MTSPR8 : XFXForm_1<31, 467, (outs), (ins i32imm:$SPR, g8rc:$RST),
533 "mtspr $SPR, $RST", IIC_SprMTSPR>;
537 // 64-bit SPR manipulation instrs.
2033 def : Pat<(i64 (int_ppc_mfspr timm:$SPR)),
2034 (MFSPR8 $SPR)>;
2035 def : Pat<(int_ppc_mtspr timm:$SPR, g8rc:$RT),
2036 (MTSPR8 $SPR, $RT)>;
H A DPPCInstrInfo.td2706 def MFSPR : XFXForm_1<31, 339, (outs gprc:$RST), (ins i32imm:$SPR),
2707 "mfspr $RST, $SPR", IIC_SprMFSPR>;
2708 def MTSPR : XFXForm_1<31, 467, (outs), (ins i32imm:$SPR, gprc:$RST),
2709 "mtspr $SPR, $RST", IIC_SprMTSPR>;
2711 def MFTB : XFXForm_1<31, 371, (outs gprc:$RST), (ins i32imm:$SPR),
2712 "mftb $RST, $SPR", IIC_SprMFTB>;
2714 def MFPMR : XFXForm_1<31, 334, (outs gprc:$RST), (ins i32imm:$SPR),
2715 "mfpmr $RST, $SPR", IIC_SprMFPMR>;
2717 def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$SPR, gprc:$RST),
2718 "mtpmr $SPR, $RST", IIC_SprMTPMR>;
[all …]
H A DPPC.td229 "Target supports move to SPR with branch fusion",
H A DP9InstrResources.td938 (instregex "MF(SPR|CTR|LR)(8)?$"),
/freebsd/crypto/openssl/doc/man3/
H A DOPENSSL_ppccap.pod107 read SPR 268. The associated probe instruction is mfspr 268.
110 CPU time base register from SPR 268, the TBL (time base lower) register, in order
/freebsd/sys/contrib/device-tree/Bindings/powerpc/opal/
H A Dpower-mgt.txt55 0x00800000 /* This state uses SPR PMICR instruction */
110 state if the flag indicates that pmicr SPR should be set. This
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dtlv320aic31xx.txt46 * SPR, devices with stereo speaker amp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86PartialReduction.cpp233 auto SPR = matchSelectPattern(SI, LHS, RHS); in trySADReplacement() local
234 if (SPR.Flavor != SPF_ABS) in trySADReplacement()
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mn-bsh-smm-s2pro.dts29 "Ext Spk", "SPR";
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DLazyValueInfo.cpp824 SelectPatternResult SPR = matchSelectPattern(SI, LHS, RHS); in solveBlockValueSelect() local
827 if (SelectPatternResult::isMinOrMax(SPR.Flavor) && in solveBlockValueSelect()
831 switch (SPR.Flavor) { in solveBlockValueSelect()
849 if (SPR.Flavor == SPF_ABS) { in solveBlockValueSelect()
858 if (SPR.Flavor == SPF_NABS) { in solveBlockValueSelect()
H A DValueTracking.cpp8389 SelectPatternResult SPR = matchClamp(Pred, CmpLHS, CmpRHS, TrueVal, FalseVal); in matchMinMax() local
8390 if (SPR.Flavor != SelectPatternFlavor::SPF_UNKNOWN) in matchMinMax()
8391 return SPR; in matchMinMax()
8393 SPR = matchMinMaxOfMinMax(Pred, CmpLHS, CmpRHS, TrueVal, FalseVal, Depth); in matchMinMax()
8394 if (SPR.Flavor != SelectPatternFlavor::SPF_UNKNOWN) in matchMinMax()
8395 return SPR; in matchMinMax()
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam43x-epos-evm.dts116 "Speaker", "SPR";
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSelect.cpp4158 SelectPatternResult SPR = matchSelectPattern(&SI, LHS, RHS, &CastOp); in visitSelectInst() local
4159 auto SPF = SPR.Flavor; in visitSelectInst()
4184 CmpInst::Predicate MinMaxPred = getMinMaxPred(SPF, SPR.Ordered); in visitSelectInst()
H A DInstCombineCompares.cpp7655 SelectPatternResult SPR = matchSelectPattern(SI, A, B); in visitICmpInst() local
7656 if (SPR.Flavor != SPF_UNKNOWN) in visitICmpInst()
8600 SelectPatternResult SPR = matchSelectPattern(SI, A, B); in visitFCmpInst() local
8601 if (SPR.Flavor != SPF_UNKNOWN) in visitFCmpInst()
/freebsd/contrib/file/magic/Magdir/
H A Ddatabase682 # Foxpro Generated Screen Program *.SPR
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp3790 auto SPR = matchSelectPattern(&I, LHS, RHS); in visitSelect() local
3792 switch (SPR.Flavor) { in visitSelect()
3798 switch (SPR.NaNBehavior) { in visitSelect()
3811 switch (SPR.NaNBehavior) { in visitSelect()

12