| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelDAGToDAG.cpp | 195 case ISD::SMUL_LOHI: in trySelect()
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| H A D | MipsSEISelLowering.cpp | 175 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in MipsSETargetLowering()
186 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Custom); in MipsSETargetLowering()
227 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in MipsSETargetLowering()
274 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in MipsSETargetLowering()
453 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 517 bool isSigned = N->getOpcode() == ISD::SMUL_LOHI; in selectMultiplication()
583 case ISD::SMUL_LOHI: in trySelect()
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| H A D | AVRISelLowering.cpp | 173 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); in AVRTargetLowering()
179 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); in AVRTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 257 SMUL_LOHI, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 337 setOperationAction(ISD::SMUL_LOHI, WordV, Custom); in initializeHVXLowering()
489 case HexagonISD::SMUL_LOHI: in getCustomHvxOperationAction()
1913 return DAG.getNode(HexagonISD::SMUL_LOHI, dl, ResTys, {Vs, Vt}).getValue(1); in LowerHvxMulh()
1936 bool SignedVu = Opc == HexagonISD::SMUL_LOHI; in LowerHvxMulLoHi()
1937 bool SignedVv = Opc == HexagonISD::SMUL_LOHI || Opc == HexagonISD::USMUL_LOHI; in LowerHvxMulLoHi()
1944 if (Opc == HexagonISD::SMUL_LOHI) { in LowerHvxMulLoHi()
1945 // Direct MULHS expansion is cheaper than doing the whole SMUL_LOHI, in LowerHvxMulLoHi()
2150 return Swap(DAG.getNode(HexagonISD::SMUL_LOHI, dl, Op->getVTList(), in LowerHvxIntrinsic()
3223 case ISD::SMUL_LOHI: in LowerHvxOperation()
3240 case HexagonISD::SMUL_LOHI in LowerHvxOperation()
[all...] |
| H A D | HexagonISelLowering.h | 64 SMUL_LOHI, // Same as ISD::SMUL_LOHI, but opaque to the combiner. enumerator
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| H A D | HexagonISelLowering.cpp | 1603 ISD::SMUL_LOHI, ISD::UMUL_LOHI}) { in HexagonTargetLowering()
1648 ISD::UADDO, ISD::SSUBO, ISD::USUBO, ISD::SMUL_LOHI, ISD::UMUL_LOHI, in HexagonTargetLowering()
1936 case HexagonISD::SMUL_LOHI: return "HexagonISD::SMUL_LOHI"; in getTargetNodeName()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 93 SMUL_LOHI, enumerator
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| H A D | SystemZOperators.td | 287 def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>;
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| H A D | SystemZISelLowering.cpp | 217 setOperationAction(ISD::SMUL_LOHI, VT, Custom); in SystemZTargetLowering()
245 setOperationAction(ISD::SMUL_LOHI, MVT::i128, Expand); in SystemZTargetLowering()
4126 lowerGR128Binary(DAG, DL, VT, SystemZISD::SMUL_LOHI, in lowerSMUL_LOHI()
6154 case ISD::SMUL_LOHI: in LowerOperation()
6394 OPCODE(SMUL_LOHI); in getTargetNodeName()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 96 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in XCoreTargetLowering()
205 case ISD::SMUL_LOHI: return LowerSMUL_LOHI(Op, DAG); in LowerOperation()
533 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI && in LowerSMUL_LOHI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 124 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
129 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 271 case ISD::SMUL_LOHI: return "smul_lohi"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 3792 Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : ISD::SMUL_LOHI; in ExpandNode()
3802 case ISD::SMUL_LOHI: { in ExpandNode()
3842 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, VT); in ExpandNode()
3848 OpToUse = ISD::SMUL_LOHI; in ExpandNode()
3852 OpToUse = ISD::SMUL_LOHI; in ExpandNode()
5279 case ISD::SMUL_LOHI: { in PromoteNode()
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| H A D | TargetLowering.cpp | 6397 if (isOperationLegalOrCustom(ISD::SMUL_LOHI, VT, IsAfterLegalization)) { in BuildSDIV()
6399 DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT), X, Y); in BuildSDIV()
7549 Opcode == ISD::SMUL_LOHI); in expandMUL_LOHI()
7556 isOperationLegalOrCustom(ISD::SMUL_LOHI, HiLoVT); in expandMUL_LOHI()
7574 Lo = DAG.getNode(Signed ? ISD::SMUL_LOHI : ISD::UMUL_LOHI, dl, VTs, L, R); in expandMUL_LOHI()
7689 if (!MakeMUL_LOHI(LH, RH, Lo, Hi, Opcode == ISD::SMUL_LOHI)) in expandMUL_LOHI()
7701 if (Opcode == ISD::SMUL_LOHI) { in expandMUL_LOHI()
10693 unsigned LoHiOp = Signed ? ISD::SMUL_LOHI : ISD::UMUL_LOHI; in expandFixedPointMul()
10992 { ISD::MULHS, ISD::SMUL_LOHI, ISD::SIGN_EXTEND }}; in expandMULO()
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| H A D | LegalizeVectorOps.cpp | 439 case ISD::SMUL_LOHI: in LegalizeOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 109 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 470 setOperationAction({ISD::SMUL_LOHI, ISD::UMUL_LOHI}, VT, Expand); in AMDGPUTargetLowering()
515 ISD::SREM, ISD::UREM, ISD::SMUL_LOHI, in AMDGPUTargetLowering()
616 ISD::SMUL_LOHI, ISD::UMUL_LOHI, in AMDGPUTargetLowering()
4352 bool Signed = N->getOpcode() == ISD::SMUL_LOHI; in performMulLoHiCombine()
5144 case ISD::SMUL_LOHI: in PerformDAGCombine()
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| H A D | AMDGPUISelDAGToDAG.cpp | 647 case ISD::SMUL_LOHI: in Select()
1041 bool Signed = N->getOpcode() == ISD::SMUL_LOHI; in SelectMUL_LOHI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 68 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 117 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in LanaiTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 86 ISD::MULHS, ISD::MULHU, ISD::UMUL_LOHI, ISD::SMUL_LOHI}) { in M68kTargetLowering()
92 for (auto OP : {ISD::UMUL_LOHI, ISD::SMUL_LOHI}) { in M68kTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2568 case ISD::SMUL_LOHI: in matchAddressRecursively()
5616 case ISD::SMUL_LOHI: in Select()
5623 bool IsSigned = Opcode == ISD::SMUL_LOHI; in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1838 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
1854 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in SparcTargetLowering()
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