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Searched refs:SETUO (Results 1 – 25 of 34) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td201 def : PatFPSetcc<SETUO, FCMP_CUN_S, FPR32>;
221 defm : PatFPBrcond<SETUO, FCMP_CUN_S, FPR32>;
238 def : PatStrictFsetccs<SETUO, FCMP_SUN_S, FPR32>;
261 def : PatFPSelectcc<SETUO, FCMP_CUN_S, FSEL_xS, FPR32>;
H A DLoongArchFloat64InstrInfo.td181 def : PatFPSetcc<SETUO, FCMP_CUN_D, FPR64>;
193 defm : PatFPBrcond<SETUO, FCMP_CUN_D, FPR64>;
207 def : PatStrictFsetccs<SETUO, FCMP_SUN_D, FPR64>;
226 def : PatFPSelectcc<SETUO, FCMP_CUN_D, FSEL_xD, FPR64>;
H A DLoongArchLASXInstrInfo.td1539 defm : PatCCXrXrF<SETUO, "XVFCMP_CUN">;
H A DLoongArchLSXInstrInfo.td1661 defm : PatCCVrVrF<SETUO, "VFCMP_CUN">;
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td381 defm : BRCond_Bin_F2<SETUO, "f2FCMPUO", BT32, BF32, MVC32>;
426 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm, SETUO)), bb:$imm16),
428 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm, SETUO)),
430 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm, SETUO)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td361 defm : BRCond_Bin<SETUO, "FCMPUO", BT32, BF32, MVC32>;
400 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm, SETUO)), bb:$imm16),
402 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm, SETUO)),
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1584 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) enumerator
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DAnalysis.cpp209 case FCmpInst::FCMP_UNO: return ISD::SETUO; in getFCmpCondCode()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp509 case ISD::SETUO: return "setuo"; in getOperationName()
H A DTargetLowering.cpp358 case ISD::SETUO: in softenSetCCOperands()
5198 if (Cond == ISD::SETO || Cond == ISD::SETUO) in SimplifySetCC()
5263 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO; in SimplifySetCC()
8511 MinMax = DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, LHS, RHS, ISD::SETUO), in expandFMINIMUM_FMAXIMUM()
8614 isCondCodeLegalOrCustom(IsInverted ? ISD::SETO : ISD::SETUO, in expandIS_FPCLASS()
8617 IsInverted ? ISD::SETO : ISD::SETUO); in expandIS_FPCLASS()
11200 SDValue IsNan = DAG.getSetCC(dl, SetCCVT, Src, Src, ISD::CondCode::SETUO); in expandFP_TO_INT_SAT()
11233 SDValue IsNan = DAG.getSetCC(dl, SetCCVT, Src, Src, ISD::CondCode::SETUO); in expandFP_TO_INT_SAT()
11318 Op, Op, ISD::SETUO); in expandFP_ROUND()
11582 case ISD::SETUO: in LegalizeSetCCCondCode()
[all …]
H A DSelectionDAG.cpp666 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT in getSetCCAndOperation()
2556 case ISD::SETUO: in FoldSetCC()
2634 case ISD::SETUO: return getBoolConstant(R==APFloat::cmpUnordered, dl, VT, in FoldSetCC()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td355 def COND_UO : PatFrags<(ops), [(OtherVT SETUO)]>;
H A DSIWholeQuadMode.cpp836 case ISD::SETUO: in lowerKillF32()
H A DR600ISelLowering.cpp87 setCondCodeAction({ISD::SETO, ISD::SETUO, ISD::SETLT, ISD::SETLE, ISD::SETOLT, in R600TargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp861 case ISD::SETUO: in IntCondCCodeToICC()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td856 def SETUO : CondCode<"FCMP_UNO">;
1497 (setcc node:$lhs, node:$rhs, SETUO)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SVEInstrInfo.td2046 defm FCMUO_PPzZZ : sve_fp_3op_p_pd_cc<0b100, "fcmuo", SETUO, SETUO, SETUO, SETUO>;
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp127 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td140 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
141 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
H A DMipsSEISelLowering.cpp1854 Op->getOperand(2), ISD::SETUO); in lowerINTRINSIC_WO_CHAIN()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp594 case ISD::SETUO: in getPTXCmpMode()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4314 case ISD::SETUO: return PPC::PRED_UN; in getPredicateForSetCC()
4334 case ISD::SETUO: return 3; // Bit #3 = SETUO in getCRIdxForSetCC()
H A DPPCISelLowering.cpp671 setCondCodeAction(ISD::SETUO, MVT::f32, Expand); in PPCTargetLowering()
672 setCondCodeAction(ISD::SETUO, MVT::f64, Expand); in PPCTargetLowering()
995 setCondCodeAction(ISD::SETUO, MVT::v4f32, Expand); in PPCTargetLowering()
1048 setCondCodeAction(ISD::SETUO, MVT::v2f64, Expand); in PPCTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1575 case ISD::SETUO: return SPCC::FCC_U; in FPCondCCodeToFCC()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp440 ISD::SETGE, ISD::SETNE, ISD::SETO, ISD::SETUO}; in RISCVTargetLowering()
941 ISD::SETUGE, ISD::SETULT, ISD::SETULE, ISD::SETUO, in RISCVTargetLowering()
2944 ISD::CondCode::SETUO); in lowerFP_TO_INT_SAT()
10000 SDValue StartIsNaN = DAG.getSetCC(DL, XLenVT, Start, Start, ISD::SETUO); in lowerVPREDUCE()
15445 return DAG.getSelectCC(DL, Src, Src, ZeroInt, FpToInt, ISD::CondCode::SETUO);

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