| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFloat32InstrInfo.td | 195 def : PatFPSetcc<SETONE, FCMP_CNE_S, FPR32>;
215 defm : PatFPBrcond<SETONE, FCMP_CNE_S, FPR32>;
232 def : PatStrictFsetccs<SETONE, FCMP_SNE_S, FPR32>;
255 def : PatFPSelectcc<SETONE, FCMP_CNE_S, FSEL_xS, FPR32>;
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| H A D | LoongArchFloat64InstrInfo.td | 175 def : PatFPSetcc<SETONE, FCMP_CNE_D, FPR64>;
187 defm : PatFPBrcond<SETONE, FCMP_CNE_D, FPR64>;
201 def : PatStrictFsetccs<SETONE, FCMP_SNE_D, FPR64>;
220 def : PatFPSelectcc<SETONE, FCMP_CNE_D, FSEL_xD, FPR64>;
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| H A D | LoongArchLASXInstrInfo.td | 1535 defm : PatCCXrXrF<SETONE, "XVFCMP_CNE">;
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| H A D | LoongArchLSXInstrInfo.td | 1659 defm : PatCCVrVrF<SETONE, "VFCMP_CNE">;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1582 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
1626 return Code == SETOEQ || Code == SETONE || Code == SETUEQ || Code == SETUNE; in isFPEqualitySetCC()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | Analysis.cpp | 207 case FCmpInst::FCMP_ONE: return ISD::SETONE; in getFCmpCondCode()
224 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 506 case ISD::SETONE: return "setone"; in getOperationName()
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| H A D | TargetLowering.cpp | 363 case ISD::SETONE: in softenSetCCOperands()
5239 case ISD::SETONE: NewCond = IsNegInf ? ISD::SETOGT : ISD::SETOLT; break; in SimplifySetCC()
8598 ISD::CondCode UnorderedCmpOpcode = IsInverted ? ISD::SETONE : ISD::SETUEQ; in expandIS_FPCLASS()
11600 case ISD::SETONE: in LegalizeSetCCCondCode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 88 ISD::SETOLE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGE, in R600TargetLowering()
897 case ISD::SETONE: in LowerSELECT_CC()
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| H A D | AMDGPUInstructions.td | 349 def COND_ONE : PatFrags<(ops), [(OtherVT SETONE), (OtherVT SETNE)]>;
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| H A D | SIWholeQuadMode.cpp | 859 case ISD::SETONE: in lowerKillF32()
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| H A D | AMDGPUISelLowering.cpp | 1602 case ISD::SETONE: in combineFMinMaxLegacyImpl()
2381 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFCEIL()
2542 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFFLOOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 852 case ISD::SETONE: in IntCondCCodeToICC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 115 ISD::SETONE, ISD::SETUEQ, ISD::SETUGT, in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 850 def SETONE : CondCode<"FCMP_ONE">;
1489 (setcc node:$lhs, node:$rhs, SETONE)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 344 setCondCodeAction(ISD::SETONE, MVT::v64f16, Expand); in initializeHVXLowering()
357 setCondCodeAction(ISD::SETONE, MVT::v32f32, Expand); in initializeHVXLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 127 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsMSAInstrInfo.td | 136 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
137 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
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| H A D | MipsSEISelLowering.cpp | 1834 Op->getOperand(2), ISD::SETONE); in lowerINTRINSIC_WO_CHAIN()
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| H A D | MipsISelLowering.cpp | 634 case ISD::SETONE: return Mips::FCOND_ONE; in condCodeToFCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1824 case ISD::SETONE: in TranslateM68kCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 590 case ISD::SETONE: in getPTXCmpMode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 684 setCondCodeAction(ISD::SETONE, MVT::f32, Expand); in PPCTargetLowering()
685 setCondCodeAction(ISD::SETONE, MVT::f64, Expand); in PPCTargetLowering()
998 setCondCodeAction(ISD::SETONE, MVT::v4f32, Expand); in PPCTargetLowering()
1051 setCondCodeAction(ISD::SETONE, MVT::v2f64, Expand); in PPCTargetLowering()
1232 setCondCodeAction(ISD::SETONE, MVT::f128, Expand); in PPCTargetLowering()
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| H A D | PPCISelDAGToDAG.cpp | 4290 case ISD::SETONE: in getPredicateForSetCC()
4345 case ISD::SETONE: in getCRIdxForSetCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1577 case ISD::SETONE: return SPCC::FCC_LG; in FPCondCCodeToFCC()
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