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Searched refs:SETOGT (Results 1 – 25 of 37) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td383 defm : BRCond_Bin_SWAP_F2<SETOGT, "f2FCMPLT", BT32, BF32, MVC32>;
414 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)), bb:$imm16),
416 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)),
418 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td363 defm : BRCond_Bin_SWAP<SETOGT, "FCMPLT", BT32, BF32, MVC32>;
388 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm0, SETOGT)), bb:$imm16),
390 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm0, SETOGT)),
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DAnalysis.cpp203 case FCmpInst::FCMP_OGT: return ISD::SETOGT; in getFCmpCondCode()
227 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1689 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.h113 case ISD::SETOGT: in fpCondCode2Fcc()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td89 defm GT : ComparisonFP<SETOGT, "gt ", 0x5e, 0x64>;
H A DWebAssemblyInstrSIMD.td793 defm GT : SIMDConditionFP<"gt", SETOGT, 68>;
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFloat64InstrInfo.td170 // SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
H A DLoongArchFloat32InstrInfo.td194 // SETOGT/SETOGE/SETUGT/SETUGE/SETGE/SETNE/SETGT will expand into
H A DLoongArchISelLowering.cpp179 ISD::SETOGT, ISD::SETOGE, ISD::SETUGT, ISD::SETUGE, in LoongArchTargetLowering()
327 setCondCodeAction({ISD::SETGE, ISD::SETGT, ISD::SETOGE, ISD::SETOGT, in LoongArchTargetLowering()
394 setCondCodeAction({ISD::SETGE, ISD::SETGT, ISD::SETOGE, ISD::SETOGT, in LoongArchTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp524 case ISD::SETOGT: return "setogt"; in getOperationName()
H A DTargetLowering.cpp364 case ISD::SETOGT: in softenSetCCOperands()
5453 case ISD::SETONE: NewCond = IsNegInf ? ISD::SETOGT : ISD::SETOLT; break; in SimplifySetCC()
8735 DAG.getSetCC(DL, CCVT, LHS, RHS, IsMax ? ISD::SETOGT : ISD::SETOLT); in expandFMINIMUM_FMAXIMUM()
11731 SDValue OGT = DAG.getSetCC(dl, SetCCVT, Src, MaxFloatNode, ISD::SETOGT); in expandFP_TO_INT_SAT()
11784 DAG.getSetCC(dl, WideSetCCVT, AbsWide, AbsNarrowAsWide, ISD::SETOGT); in expandRoundInexactToOdd()
12189 if (!isCondCodeLegal(CC2, OpVT) && (isCondCodeLegal(ISD::SETOGT, OpVT) || in LegalizeSetCCCondCode()
12191 CC1 = ISD::SETOGT; in LegalizeSetCCCondCode()
12199 case ISD::SETOGT: in LegalizeSetCCCondCode()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4233 case ISD::SETOGT: in SelectCC()
4260 case ISD::SETOGT: in SelectCC()
4306 case ISD::SETOGT: in getPredicateForSetCC()
4329 case ISD::SETOGT: in getCRIdxForSetCC()
4367 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
4376 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
4390 case ISD::SETOGT: in getVCmpInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td350 def COND_OGT : PatFrags<(ops), [(OtherVT SETOGT), (OtherVT SETGT)]>;
H A DSIWholeQuadMode.cpp853 case ISD::SETOGT: in lowerKillF32()
H A DAMDGPUISelLowering.cpp1705 case ISD::SETOGT: { in combineFMinMaxLegacyImpl()
2437 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL()
2530 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFROUNDEVEN()
3157 DAG.getSetCC(SL, SetCCVT, X, OverflowCheckConst, ISD::SETOGT); in lowerFEXP()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp300 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in MipsSETargetLowering()
305 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in MipsSETargetLowering()
437 setCondCodeAction(ISD::SETOGT, Ty, Expand); in addMSAFloatType()
H A DMipsMSAInstrInfo.td130 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
131 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp846 case ISD::SETOGT: in IntCondCCodeToICC()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td909 def SETOGT : CondCode<"FCMP_OGT">;
1574 (setcc node:$lhs, node:$rhs, SETOGT)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp874 case ISD::SETOGT: in getFPBranchKind()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp375 case ISD::SETOGT: in getPTXCmpMode()
H A DNVPTXISelLowering.cpp2432 ISD::SETOGT); in LowerFROUND32()
2475 ISD::SETOGT); in LowerFROUND64()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3618 case ISD::SETOGT: in getVectorComparison()
3738 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC()
3755 SDValue LT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC()
3757 SDValue GT = getVectorCmp(DAG, getVectorComparison(ISD::SETOGT, Mode), in lowerVectorSETCC()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1811 case ISD::SETOGT: in TranslateM68kCC()

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