| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.cpp | 83 case ISD::SELECT_CC: in hasNativeBF16Support()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.td | 386 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
389 def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
391 "# SELECT_CC PSEUDO!",
1237 (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
1240 (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
1243 (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1245 (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1247 (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1249 (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1251 (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 111 setOperationAction(ISD::SELECT_CC, {MVT::f32, MVT::i32}, Custom); in R600TargetLowering()
206 ISD::SELECT_CC, ISD::INSERT_VECTOR_ELT, ISD::LOAD}); in R600TargetLowering()
414 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
855 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC); in LowerSELECT_CC()
912 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
936 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC); in LowerSELECT_CC()
938 return DAG.getNode(ISD::SELECT_CC, DL, VT, in LowerSELECT_CC()
1748 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1756 return DAG.getNode(ISD::SELECT_CC, DL, N->getValueType(0), in PerformDAGCombine()
1839 case ISD::SELECT_CC: { in PerformDAGCombine()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaOperators.td | 70 def Xtensa_select_cc: SDNode<"XtensaISD::SELECT_CC", SDT_XtensaSelectCC,
|
| H A D | XtensaISelLowering.h | 54 SELECT_CC, enumerator
|
| H A D | XtensaISelLowering.cpp | 117 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in XtensaTargetLowering()
121 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in XtensaTargetLowering()
124 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in XtensaTargetLowering()
903 SDValue Res = DAG.getNode(XtensaISD::SELECT_CC, DL, Ty, LHS, RHS, TrueValue, in LowerSELECT_CC()
1476 case ISD::SELECT_CC: in LowerOperation()
1523 case XtensaISD::SELECT_CC: in getTargetNodeName()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.h | 28 SELECT_CC, enumerator
|
| H A D | BPFISelLowering.cpp | 131 setOperationAction(ISD::SELECT_CC, VT, Custom); in BPFTargetLowering()
323 case ISD::SELECT_CC: in LowerOperation()
720 return DAG.getNode(BPFISD::SELECT_CC, DL, Op.getValueType(), Ops); in LowerSELECT_CC()
791 case BPFISD::SELECT_CC: in getTargetNodeName()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 95 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in MSP430TargetLowering()
96 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in MSP430TargetLowering()
229 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
1087 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSETCC()
1105 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSELECT_CC()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 793 SELECT_CC, enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 162 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break; in SoftenFloatResult()
1047 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), in SoftenFloatRes_SELECT_CC()
1163 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break; in SoftenFloatOperand()
1544 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in ExpandFloatResult()
2303 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break; in ExpandFloatOperand()
2637 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break; in PromoteFloatOperand()
2740 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0), in PromoteFloatOp_SELECT_CC()
2900 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break; in PromoteFloatResult()
3212 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), in PromoteFloatRes_SELECT_CC()
3382 case ISD::SELECT_CC: R = SoftPromoteHalfRes_SELECT_CC(N); break; in SoftPromoteHalfResult()
[all …]
|
| H A D | LegalizeTypesGeneric.cpp | 580 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
582 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
|
| H A D | LegalizeDAG.cpp | 1067 case ISD::SELECT_CC: in LegalizeOp()
1075 unsigned CCOperand = Opc == ISD::SELECT_CC ? 4 in LegalizeOp()
1090 if (Node->getOpcode() == ISD::SELECT_CC) in LegalizeOp()
4297 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, VT, Tmp1, Tmp2, in ExpandNode()
4304 case ISD::SELECT_CC: { in ExpandNode()
4368 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), in ExpandNode()
4373 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), Tmp1, in ExpandNode()
5315 Node->getOpcode() == ISD::SELECT_CC) in PromoteNode()
5555 case ISD::SELECT_CC: { in PromoteNode()
5579 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, NVT, {Tmp1, Tmp2, Tmp3, Tmp4, Cond}, in PromoteNode()
|
| H A D | LegalizeVectorOps.cpp | 396 case ISD::SELECT_CC: in LegalizeOp()
1000 case ISD::SELECT_CC: { in Expand()
2091 DAG.getNode(ISD::SELECT_CC, dl, VT, LHS, RHS, in ExpandSETCC()
|
| H A D | SelectionDAGDumper.cpp | 340 case ISD::SELECT_CC: return "select_cc"; in getOperationName()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 88 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in LanaiTargetLowering()
181 case ISD::SELECT_CC: in LowerOperation()
984 return DAG.getNode(LanaiISD::SELECT_CC, DL, Op.getValueType(), TrueV, FalseV, in LowerSELECT_CC()
1453 case LanaiISD::SELECT_CC: in computeKnownBitsForTargetNode()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 108 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in AVRTargetLowering()
109 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in AVRTargetLowering()
110 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in AVRTargetLowering()
111 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in AVRTargetLowering()
842 return DAG.getNode(AVRISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSELECT_CC()
858 return DAG.getNode(AVRISD::SELECT_CC, DL, Op.getValueType(), Ops); in LowerSETCC()
938 case ISD::SELECT_CC: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 146 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in ARCTargetLowering()
776 case ISD::SELECT_CC: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.h | 38 SELECT_CC, enumerator
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 906 setTargetDAGCombine(ISD::SELECT_CC); in VETargetLowering()
2814 assert(N->getOpcode() == ISD::SELECT_CC && in combineSelectCC()
2911 case ISD::SELECT_CC: in isI32Insn()
2958 if (User->getOpcode() == ISD::SELECT_CC || in isI32InsnAllUses()
2986 if (N->getOperand(0)->getOpcode() == ISD::SELECT_CC && in combineTRUNCATE()
3018 case ISD::SELECT_CC: in PerformDAGCombine()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 520 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in PPCTargetLowering()
521 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in PPCTargetLowering()
850 setOperationAction(ISD::SELECT_CC, VT, Promote); in PPCTargetLowering()
851 AddPromotedToType (ISD::SELECT_CC, VT, MVT::v4i32); in PPCTargetLowering()
902 setOperationAction(ISD::SELECT_CC, MVT::v4i32, Expand); in PPCTargetLowering()
1321 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in PPCTargetLowering()
1324 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in PPCTargetLowering()
1325 setOperationAction(ISD::SELECT_CC, MVT::i64, isPPC64 ? Custom : Expand); in PPCTargetLowering()
1353 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in PPCTargetLowering()
1430 setTargetDAGCombine({ISD::TRUNCATE, ISD::SETCC, ISD::SELECT_CC}); in PPCTargetLowering()
[all …]
|
| H A D | PPCISelDAGToDAG.cpp | 4005 Compare.getOpcode() == ISD::SELECT_CC) && in getSETCCInGPR()
4017 int CCOpNum = Compare.getOpcode() == ISD::SELECT_CC ? 4 : 2; in getSETCCInGPR()
4679 assert(N->getOpcode() == ISD::SELECT_CC && "Expecting a SELECT_CC here."); in mayUseP9Setb()
4700 (FalseRes.getOpcode() != ISD::SELECT_CC || CC != ISD::SETEQ))) in mayUseP9Setb()
4703 SDValue SetOrSelCC = FalseRes.getOpcode() == ISD::SELECT_CC in mayUseP9Setb()
4706 bool InnerIsSel = SetOrSelCC.getOpcode() == ISD::SELECT_CC; in mayUseP9Setb()
4708 SetOrSelCC.getOpcode() != ISD::SELECT_CC) in mayUseP9Setb()
5838 case ISD::SELECT_CC: { in Select()
6409 if (O.getOpcode() != ISD::SELECT_CC) in combineToCMPB()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1722 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in SparcTargetLowering()
1723 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in SparcTargetLowering()
1724 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in SparcTargetLowering()
1725 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in SparcTargetLowering()
1745 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); in SparcTargetLowering()
3123 case ISD::SELECT_CC: in LowerOperation()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 69 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in CSKYTargetLowering()
129 setOperationAction(ISD::SELECT_CC, VT, Expand); in CSKYTargetLowering()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 165 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); in MipsSETargetLowering()
285 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in MipsSETargetLowering()
289 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in MipsSETargetLowering()
294 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); in MipsSETargetLowering()
332 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in MipsSETargetLowering()
|