| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaOperators.td | 47 def Xtensa_select_cc: SDNode<"XtensaISD::SELECT_CC", SDT_XtensaSelectCC,
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| H A D | XtensaISelLowering.h | 42 SELECT_CC, enumerator
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| H A D | XtensaISelLowering.cpp | 93 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in XtensaTargetLowering()
565 return DAG.getNode(XtensaISD::SELECT_CC, DL, Ty, LHS, RHS, TrueValue, in LowerSELECT_CC()
731 case ISD::SELECT_CC: in LowerOperation()
754 case XtensaISD::SELECT_CC: in getTargetNodeName()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.td | 351 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
354 def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
356 "# SELECT_CC PSEUDO!",
1193 (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
1196 (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
1199 (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1201 (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1203 (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1205 (SELECT_CC (LSU_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1207 (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 107 setOperationAction(ISD::SELECT_CC, {MVT::f32, MVT::i32}, Custom); in R600TargetLowering()
202 ISD::SELECT_CC, ISD::INSERT_VECTOR_ELT, ISD::LOAD}); in R600TargetLowering()
410 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
851 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC); in LowerSELECT_CC()
908 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
932 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC); in LowerSELECT_CC()
934 return DAG.getNode(ISD::SELECT_CC, DL, VT, in LowerSELECT_CC()
1743 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1751 return DAG.getNode(ISD::SELECT_CC, DL, N->getValueType(0), in PerformDAGCombine()
1834 case ISD::SELECT_CC: { in PerformDAGCombine()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.h | 28 SELECT_CC, enumerator
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| H A D | BPFISelLowering.cpp | 123 setOperationAction(ISD::SELECT_CC, VT, Custom); in BPFTargetLowering()
312 case ISD::SELECT_CC: in LowerOperation()
672 return DAG.getNode(BPFISD::SELECT_CC, DL, VTs, Ops); in LowerSELECT_CC()
683 case BPFISD::SELECT_CC: in getTargetNodeName()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.h | 36 // SELECT_CC - Operand 0 and operand 1 are selection variable, operand 3
38 SELECT_CC, enumerator
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| H A D | LanaiISelLowering.cpp | 90 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in LanaiTargetLowering()
188 case ISD::SELECT_CC: in LowerOperation()
999 return DAG.getNode(LanaiISD::SELECT_CC, DL, VTs, TrueV, FalseV, TargetCC, in LowerSELECT_CC()
1103 case LanaiISD::SELECT_CC: in getTargetNodeName()
1499 case LanaiISD::SELECT_CC: in computeKnownBitsForTargetNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 64 SELECT_CC, enumerator
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| H A D | MSP430ISelLowering.cpp | 96 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in MSP430TargetLowering()
97 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in MSP430TargetLowering()
350 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
1209 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSETCC()
1227 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSELECT_CC()
1380 case MSP430ISD::SELECT_CC: return "MSP430ISD::SELECT_CC"; in getTargetNodeName()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 75 SELECT_CC enumerator
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| H A D | AVRISelLowering.cpp | 109 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in AVRTargetLowering()
110 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in AVRTargetLowering()
111 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in AVRTargetLowering()
112 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in AVRTargetLowering()
253 NODE(SELECT_CC); in getTargetNodeName()
897 return DAG.getNode(AVRISD::SELECT_CC, dl, VTs, Ops); in LowerSELECT_CC()
914 return DAG.getNode(AVRISD::SELECT_CC, DL, VTs, Ops); in LowerSETCC()
994 case ISD::SELECT_CC: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 770 SELECT_CC, enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 154 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break; in SoftenFloatResult()
905 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), in SoftenFloatRes_SELECT_CC()
1021 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break; in SoftenFloatOperand()
1392 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in ExpandFloatResult()
2087 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break; in ExpandFloatOperand()
2421 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break; in PromoteFloatOperand()
2511 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0), in PromoteFloatOp_SELECT_CC()
2655 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break; in PromoteFloatResult()
2934 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), in PromoteFloatRes_SELECT_CC()
3092 case ISD::SELECT_CC: R = SoftPromoteHalfRes_SELECT_CC(N); break; in SoftPromoteHalfResult()
[all …]
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| H A D | LegalizeTypesGeneric.cpp | 561 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
563 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
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| H A D | LegalizeDAG.cpp | 1037 case ISD::SELECT_CC: in LegalizeOp()
1045 unsigned CCOperand = Opc == ISD::SELECT_CC ? 4 in LegalizeOp()
1060 if (Node->getOpcode() == ISD::SELECT_CC) in LegalizeOp()
4159 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, VT, Tmp1, Tmp2, in ExpandNode()
4166 case ISD::SELECT_CC: { in ExpandNode()
4230 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), in ExpandNode()
4235 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), Tmp1, in ExpandNode()
5108 Node->getOpcode() == ISD::SELECT_CC) in PromoteNode()
5345 case ISD::SELECT_CC: { in PromoteNode()
5369 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, NVT, {Tmp1, Tmp2, Tmp3, Tmp4, Cond}, in PromoteNode()
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| H A D | LegalizeVectorOps.cpp | 385 case ISD::SELECT_CC: in LegalizeOp()
891 case ISD::SELECT_CC: { in Expand()
1763 DAG.getNode(ISD::SELECT_CC, dl, VT, LHS, RHS, in ExpandSETCC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 145 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in ARCTargetLowering()
792 case ISD::SELECT_CC: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 916 setTargetDAGCombine(ISD::SELECT_CC); in VETargetLowering()
2830 assert(N->getOpcode() == ISD::SELECT_CC && in combineSelectCC()
2927 case ISD::SELECT_CC: in isI32Insn()
2974 if (User->getOpcode() == ISD::SELECT_CC || in isI32InsnAllUses()
3002 if (N->getOperand(0)->getOpcode() == ISD::SELECT_CC && in combineTRUNCATE()
3034 case ISD::SELECT_CC: in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 513 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in PPCTargetLowering()
514 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in PPCTargetLowering()
841 setOperationAction(ISD::SELECT_CC, VT, Promote); in PPCTargetLowering()
842 AddPromotedToType (ISD::SELECT_CC, VT, MVT::v4i32); in PPCTargetLowering()
893 setOperationAction(ISD::SELECT_CC, MVT::v4i32, Expand); in PPCTargetLowering()
1303 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in PPCTargetLowering()
1306 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in PPCTargetLowering()
1307 setOperationAction(ISD::SELECT_CC, MVT::i64, isPPC64 ? Custom : Expand); in PPCTargetLowering()
1335 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in PPCTargetLowering()
1405 setTargetDAGCombine({ISD::TRUNCATE, ISD::SETCC, ISD::SELECT_CC}); in PPCTargetLowering()
[all …]
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| H A D | PPCISelDAGToDAG.cpp | 4006 Compare.getOpcode() == ISD::SELECT_CC) && in getSETCCInGPR()
4018 int CCOpNum = Compare.getOpcode() == ISD::SELECT_CC ? 4 : 2; in getSETCCInGPR()
4680 assert(N->getOpcode() == ISD::SELECT_CC && "Expecting a SELECT_CC here."); in mayUseP9Setb()
4701 (FalseRes.getOpcode() != ISD::SELECT_CC || CC != ISD::SETEQ))) in mayUseP9Setb()
4704 SDValue SetOrSelCC = FalseRes.getOpcode() == ISD::SELECT_CC in mayUseP9Setb()
4707 bool InnerIsSel = SetOrSelCC.getOpcode() == ISD::SELECT_CC; in mayUseP9Setb()
4709 SetOrSelCC.getOpcode() != ISD::SELECT_CC) in mayUseP9Setb()
5825 case ISD::SELECT_CC: { in Select()
6396 if (O.getOpcode() != ISD::SELECT_CC) in combineToCMPB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1729 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in SparcTargetLowering()
1730 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in SparcTargetLowering()
1731 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in SparcTargetLowering()
1732 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in SparcTargetLowering()
1749 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); in SparcTargetLowering()
3263 case ISD::SELECT_CC: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 69 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in CSKYTargetLowering()
129 setOperationAction(ISD::SELECT_CC, VT, Expand); in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 126 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); in MipsSETargetLowering()
246 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in MipsSETargetLowering()
250 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in MipsSETargetLowering()
255 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); in MipsSETargetLowering()
293 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in MipsSETargetLowering()
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