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Searched refs:S0 (Results 1 – 25 of 113) sorted by relevance

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/freebsd/cddl/contrib/opensolaris/lib/libdtrace/common/
H A Ddt_lex.l107 %s S0 S1 S2 S3 S4
142 <S0>auto return (DT_KEY_AUTO);
143 <S0>break return (DT_KEY_BREAK);
144 <S0>case return (DT_KEY_CASE);
145 <S0>char return (DT_KEY_CHAR);
146 <S0>const return (DT_KEY_CONST);
147 <S0>continue return (DT_KEY_CONTINUE);
148 <S0>counter return (DT_KEY_COUNTER);
149 <S0>default return (DT_KEY_DEFAULT);
150 <S0>do return (DT_KEY_DO);
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DMergedLoadStoreMotion.cpp115 PHINode *getPHIOperand(BasicBlock *BB, StoreInst *S0, StoreInst *S1);
118 bool canSinkStoresAndGEPs(StoreInst *S0, StoreInst *S1) const;
211 PHINode *MergedLoadStoreMotion::getPHIOperand(BasicBlock *BB, StoreInst *S0, in getPHIOperand() argument
214 Value *Opd1 = S0->getValueOperand(); in getPHIOperand()
221 NewPN->applyMergedLocation(S0->getDebugLoc(), S1->getDebugLoc()); in getPHIOperand()
222 NewPN->addIncoming(Opd1, S0->getParent()); in getPHIOperand()
230 bool MergedLoadStoreMotion::canSinkStoresAndGEPs(StoreInst *S0, in canSinkStoresAndGEPs() argument
232 if (S0->getPointerOperand() == S1->getPointerOperand()) in canSinkStoresAndGEPs()
234 auto *GEP0 = dyn_cast<GetElementPtrInst>(S0->getPointerOperand()); in canSinkStoresAndGEPs()
237 (GEP0->getParent() == S0->getParent()) && GEP1->hasOneUse() && in canSinkStoresAndGEPs()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A DStringSwitch.h90 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, T Value) { in Cases() argument
91 return Case(S0, Value).Case(S1, Value); in Cases()
94 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
96 return Case(S0, Value).Cases(S1, S2, Value); in Cases()
99 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
101 return Case(S0, Value).Cases(S1, S2, S3, Value); in Cases()
104 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
106 return Case(S0, Value).Cases(S1, S2, S3, S4, Value); in Cases()
109 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
112 return Case(S0, Valu in Cases()
115 Cases(StringLiteral S0,StringLiteral S1,StringLiteral S2,StringLiteral S3,StringLiteral S4,StringLiteral S5,StringLiteral S6,T Value) Cases() argument
121 Cases(StringLiteral S0,StringLiteral S1,StringLiteral S2,StringLiteral S3,StringLiteral S4,StringLiteral S5,StringLiteral S6,StringLiteral S7,T Value) Cases() argument
127 Cases(StringLiteral S0,StringLiteral S1,StringLiteral S2,StringLiteral S3,StringLiteral S4,StringLiteral S5,StringLiteral S6,StringLiteral S7,StringLiteral S8,T Value) Cases() argument
134 Cases(StringLiteral S0,StringLiteral S1,StringLiteral S2,StringLiteral S3,StringLiteral S4,StringLiteral S5,StringLiteral S6,StringLiteral S7,StringLiteral S8,StringLiteral S9,T Value) Cases() argument
163 CasesLower(StringLiteral S0,StringLiteral S1,T Value) CasesLower() argument
167 CasesLower(StringLiteral S0,StringLiteral S1,StringLiteral S2,T Value) CasesLower() argument
172 CasesLower(StringLiteral S0,StringLiteral S1,StringLiteral S2,StringLiteral S3,T Value) CasesLower() argument
177 CasesLower(StringLiteral S0,StringLiteral S1,StringLiteral S2,StringLiteral S3,StringLiteral S4,T Value) CasesLower() argument
[all...]
/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha256-c64xplus.pl34 ($A,$Actx,$B,$Bctx,$C,$Cctx,$D,$Dctx,$T2,$S0,$s1,$t0a,$t1a,$t2a,$X9,$X14)
124 || ROTL $A,30,$S0
140 || XOR $t0a,$S0,$S0
142 XOR $t1a,$S0,$S0 ; Sigma0(a)
147 || ADD $S0,$Maj,$T2 ; T2 = Sigma0(a) + Maj(a,b,c)
161 ROTL $A,30,$S0 ; BODY_15
179 || XOR $t0a,$S0,$S0
181 XOR $t1a,$S0,$S0 ; Sigma0(a)
186 || ADD $S0,$Maj,$T2 ; T2 = Sigma0(a) + Maj(a,b,c)
215 ROTL $A,30,$S0
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonScheduleV60.td32 // S0-3 | | | CVI_VA | | CVI_VA | | CVI_VA | | CVI_VA | | |
34 // S0-3 | | | | | | | | | CVI_VP | | |
35 // S0-3 | | | | | | | CVI_VS | | | | |
36 // S0-1 |(CVI_LD) | | CVI_LD | | CVI_LD | | CVI_LD | | CVI_LD | | |
37 // S0-1 |(C*TMP_LD) | | | | | | | | | |
39 // S0 | | | CVI_ST | | CVI_ST | | CVI_ST | | CVI_ST | |(CVI_ST) |
40 // S0 | | | | | | | | | | |(C*TMP_ST)
46 // S0-3 | CVI_VA_DV | | CVI_VA_DV |
47 // S0-3 | | | CVI_VP_DV |
51 // S0-3 | CVI_HIST Histogram |
H A DHexagonSubtarget.cpp388 SUnit &S0 = DAG->SUnits[i]; in apply() local
389 MachineInstr &L0 = *S0.getInstr(); in apply()
419 SDep A(&S0, SDep::Artificial); in apply()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16FrameLowering.cpp84 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) in emitPrologue()
102 .addReg(Mips::S0); in emitEpilogue()
168 SavedRegs.set(Mips::S0); in determineCalleeSaves()
H A DMipsRegisterInfo.td104 def S0 : MipsGPRReg< 16, "16">, DwarfRegNum<[16]>;
139 def S0_64 : Mips64GPRReg< 16, "16", [S0]>, DwarfRegNum<[16]>;
292 S0, S1, S2, S3, S4, S5, S6, S7,
312 S0, S1, S2, S3, S4, S5, S6, S7,
322 S0, S1,
342 S0, S2, S3, S4)>;
372 S0, S1)>;
378 S0, S1,
H A DMipsRegisterInfo.cpp193 Reserved.set(Mips::S0); in getReservedRegs()
278 return TFI->hasFP(MF) ? Mips::S0 : Mips::SP; in getFrameRegister()
H A DMips16RegisterInfo.cpp104 FrameReg = Mips::S0; in eliminateFI()
/freebsd/crypto/openssl/test/recipes/04-test_pem_read_depr_data/
H A Ddsapublickey.pem2 MIIDQjCCAjUGByqGSM44BAEwggIoAoIBAQCQJVsgRrrvAlhvE8lGYD41hjrsZ+S0
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_hash/sha256/cp/
H A Dhash_sha256_cp.c78 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) macro
86 h += S0(a) + Maj(a, b, c);
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_hash/sha512/cp/
H A Dhash_sha512_cp.c94 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39)) macro
102 h += S0(a) + Maj(a, b, c);
/freebsd/crypto/heimdal/appl/ftp/ftp/
H A Dmain.c434 S0: in slurpstring()
442 sb++; goto S0; in slurpstring()
/freebsd/sys/crypto/sha2/
H A Dsha256c.c111 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) macro
120 h += S0(a) + Maj(a, b, c);
H A Dsha512c.c140 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39)) macro
149 h += S0(a) + Maj(a, b, c);
/freebsd/crypto/openssl/demos/sslecho/
H A Dkey.pem28 NW7L2CNHdM74SJKl8gY/YcfEQSFcir6SFWUGPOiHsVdpKX9K0his6DoiV8QPH/S0
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVE.td36 // Use both VE register name matcher to accept "S0~S63" register names
/freebsd/usr.sbin/moused/moused/
H A Dmoused.c312 S0, /* start */ enumerator
334 /* S0 */
335 { { S0, S2, S1, S3, S0 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), false },
341 { { S0, S9, S9, S3, S3 }, MOUSE_BUTTON2DOWN, ~0, false },
343 { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON1DOWN, ~0, true },
345 { { S0, S2, S5, S7, S5 }, MOUSE_BUTTON1DOWN, ~0, false },
347 { { S0, S6, S1, S7, S6 }, MOUSE_BUTTON3DOWN, ~0, false },
349 { { S0, S
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.td79 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
99 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
227 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
247 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-qcom-dc-scm-v1.dts113 /*S0-S7*/ "","","","","","","","",
H A Daspeed-bmc-vegman-n110.dts33 /*S0-S7*/ "_SPI2_BMC_CS1","","","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","",
/freebsd/contrib/file/magic/Magdir/
H A Dmotorola39 0 string S0 Motorola S-Record; binary data in text format
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineVectorOps.cpp2463 auto *S0 = dyn_cast<Instruction>(Shuf.getOperand(0)); in foldShuffleOfUnaryOps() local
2465 if (!S0 || !match(S0, m_CombineOr(m_FNeg(m_Value(X)), m_FAbs(m_Value(X))))) in foldShuffleOfUnaryOps()
2468 bool IsFNeg = S0->getOpcode() == Instruction::FNeg; in foldShuffleOfUnaryOps()
2472 if (S0->hasOneUse() && match(Shuf.getOperand(1), m_Poison())) { in foldShuffleOfUnaryOps()
2475 return UnaryOperator::CreateFNegFMF(NewShuf, S0); in foldShuffleOfUnaryOps()
2480 NewF->setFastMathFlags(S0->getFastMathFlags()); in foldShuffleOfUnaryOps()
2488 S0->getOpcode() != S1->getOpcode() || in foldShuffleOfUnaryOps()
2489 (!S0->hasOneUse() && !S1->hasOneUse())) in foldShuffleOfUnaryOps()
2502 NewF->copyIRFlags(S0); in foldShuffleOfUnaryOps()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DConstantFolding.cpp3001 const APFloat &S0, in ConstantFoldAMDGCNCubeIntrinsic() argument
3005 const fltSemantics &Sem = S0.getSemantics(); in ConstantFoldAMDGCNCubeIntrinsic()
3007 if (abs(S2) >= abs(S0) && abs(S2) >= abs(S1)) { in ConstantFoldAMDGCNCubeIntrinsic()
3011 SC = -S0; in ConstantFoldAMDGCNCubeIntrinsic()
3014 SC = S0; in ConstantFoldAMDGCNCubeIntrinsic()
3018 } else if (abs(S1) >= abs(S0)) { in ConstantFoldAMDGCNCubeIntrinsic()
3028 SC = S0; in ConstantFoldAMDGCNCubeIntrinsic()
3030 if (S0.isNegative() && S0.isNonZero() && !S0.isNaN()) { in ConstantFoldAMDGCNCubeIntrinsic()
3038 MA = S0; in ConstantFoldAMDGCNCubeIntrinsic()

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