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Searched refs:RetireControlUnit (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRetireControlUnit.cpp22 RetireControlUnit::RetireControlUnit(const MCSchedModel &SM) in RetireControlUnit() function in llvm::mca::RetireControlUnit
43 unsigned RetireControlUnit::dispatch(const InstRef &IR) { in dispatch()
58 const RetireControlUnit::RUToken &RetireControlUnit::getCurrentToken() const { in getCurrentToken()
59 const RetireControlUnit::RUToken &Current = Queue[CurrentInstructionSlotIdx]; in getCurrentToken()
67 unsigned RetireControlUnit::computeNextSlotIdx() const { in computeNextSlotIdx()
68 const RetireControlUnit::RUToken &Current = getCurrentToken(); in computeNextSlotIdx()
73 const RetireControlUnit::RUToken &RetireControlUnit::peekNextToken() const { in peekNextToken()
77 void RetireControlUnit::consumeCurrentToken() { in consumeCurrentToken()
78 RetireControlUnit::RUToken &Current = Queue[CurrentInstructionSlotIdx]; in consumeCurrentToken()
88 void RetireControlUnit::onInstructionExecuted(unsigned TokenID) { in onInstructionExecuted()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/Stages/
H A DRetireStage.h30 RetireControlUnit &RCU;
38 RetireStage(RetireControlUnit &R, RegisterFile &F, LSUnitBase &LS) in RetireStage()
H A DDispatchStage.h55 RetireControlUnit &RCU;
69 unsigned MaxDispatchWidth, RetireControlUnit &R,
/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DRetireControlUnit.h36 struct RetireControlUnit : public HardwareUnit { struct
80 RetireControlUnit(const MCSchedModel &SM); argument
/freebsd/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DRetireStage.cpp33 const RetireControlUnit::RUToken &Current = RCU.getCurrentToken(); in cycleStart()
54 assert(TokenID != RetireControlUnit::UnhandledTokenID); in execute()
H A DDispatchStage.cpp30 unsigned MaxDispatchWidth, RetireControlUnit &R, in DispatchStage()
H A DInOrderIssueStage.cpp224 unsigned RCUTokenID = RetireControlUnit::UnhandledTokenID; in tryIssue()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenSchedule.h253 Record *RetireControlUnit; member
261 RetireControlUnit(nullptr), LoadQueue(nullptr), StoreQueue(nullptr) {} in CodeGenProcModel()
272 return RetireControlUnit || LoadQueue || StoreQueue || in hasExtraProcessorInfo()
H A DCodeGenSchedule.cpp482 if (PM.RetireControlUnit) { in collectRetireControlUnits()
485 PrintNote(PM.RetireControlUnit->getLoc(), in collectRetireControlUnits()
488 PM.RetireControlUnit = RCU; in collectRetireControlUnits()
/freebsd/contrib/llvm-project/llvm/lib/MCA/
H A DContext.cpp40 auto RCU = std::make_unique<RetireControlUnit>(SM); in createDefaultPipeline()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSchedule.td567 // Models can optionally specify up to one instance of RetireControlUnit per
569 class RetireControlUnit<int bufferSize, int retirePerCycle> {
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp703 if (Record *RCU = ProcModel.RetireControlUnit) { in EmitRetireControlUnitInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleBtVer2.td70 def JRCU : RetireControlUnit<64, 2>;
H A DX86ScheduleZnver1.td121 def ZnRCU : RetireControlUnit<192, 8>;
H A DX86ScheduleZnver2.td122 def Zn2RCU : RetireControlUnit<192, 8>;
H A DX86ScheduleBdVer2.td82 def PdRCU : RetireControlUnit<128, 4>;
H A DX86ScheduleZnver3.td75 def Zn3RCU : RetireControlUnit<Znver3Model.MicroOpBufferSize, 8>;
H A DX86ScheduleZnver4.td71 def Zn4RCU : RetireControlUnit<Znver4Model.MicroOpBufferSize, 9>;
/freebsd/lib/clang/libllvm/
H A DMakefile969 SRCS_EXT+= MCA/HardwareUnits/RetireControlUnit.cpp