/freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/ |
H A D | RetireControlUnit.cpp | 22 RetireControlUnit::RetireControlUnit(const MCSchedModel &SM) in RetireControlUnit() function in llvm::mca::RetireControlUnit 43 unsigned RetireControlUnit::dispatch(const InstRef &IR) { in dispatch() 58 const RetireControlUnit::RUToken &RetireControlUnit::getCurrentToken() const { in getCurrentToken() 59 const RetireControlUnit::RUToken &Current = Queue[CurrentInstructionSlotIdx]; in getCurrentToken() 67 unsigned RetireControlUnit::computeNextSlotIdx() const { in computeNextSlotIdx() 68 const RetireControlUnit::RUToken &Current = getCurrentToken(); in computeNextSlotIdx() 73 const RetireControlUnit::RUToken &RetireControlUnit::peekNextToken() const { in peekNextToken() 77 void RetireControlUnit::consumeCurrentToken() { in consumeCurrentToken() 78 RetireControlUnit::RUToken &Current = Queue[CurrentInstructionSlotIdx]; in consumeCurrentToken() 88 void RetireControlUnit::onInstructionExecuted(unsigned TokenID) { in onInstructionExecuted() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/Stages/ |
H A D | RetireStage.h | 30 RetireControlUnit &RCU; 38 RetireStage(RetireControlUnit &R, RegisterFile &F, LSUnitBase &LS) in RetireStage()
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H A D | DispatchStage.h | 55 RetireControlUnit &RCU; 69 unsigned MaxDispatchWidth, RetireControlUnit &R,
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/ |
H A D | RetireControlUnit.h | 36 struct RetireControlUnit : public HardwareUnit { struct 80 RetireControlUnit(const MCSchedModel &SM); argument
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/freebsd/contrib/llvm-project/llvm/lib/MCA/Stages/ |
H A D | RetireStage.cpp | 33 const RetireControlUnit::RUToken &Current = RCU.getCurrentToken(); in cycleStart() 54 assert(TokenID != RetireControlUnit::UnhandledTokenID); in execute()
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H A D | DispatchStage.cpp | 30 unsigned MaxDispatchWidth, RetireControlUnit &R, in DispatchStage()
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H A D | InOrderIssueStage.cpp | 224 unsigned RCUTokenID = RetireControlUnit::UnhandledTokenID; in tryIssue()
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
H A D | CodeGenSchedule.h | 253 Record *RetireControlUnit; member 261 RetireControlUnit(nullptr), LoadQueue(nullptr), StoreQueue(nullptr) {} in CodeGenProcModel() 272 return RetireControlUnit || LoadQueue || StoreQueue || in hasExtraProcessorInfo()
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H A D | CodeGenSchedule.cpp | 482 if (PM.RetireControlUnit) { in collectRetireControlUnits() 485 PrintNote(PM.RetireControlUnit->getLoc(), in collectRetireControlUnits() 488 PM.RetireControlUnit = RCU; in collectRetireControlUnits()
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/freebsd/contrib/llvm-project/llvm/lib/MCA/ |
H A D | Context.cpp | 40 auto RCU = std::make_unique<RetireControlUnit>(SM); in createDefaultPipeline()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetSchedule.td | 567 // Models can optionally specify up to one instance of RetireControlUnit per 569 class RetireControlUnit<int bufferSize, int retirePerCycle> {
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | SubtargetEmitter.cpp | 703 if (Record *RCU = ProcModel.RetireControlUnit) { in EmitRetireControlUnitInfo()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ScheduleBtVer2.td | 70 def JRCU : RetireControlUnit<64, 2>;
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H A D | X86ScheduleZnver1.td | 121 def ZnRCU : RetireControlUnit<192, 8>;
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H A D | X86ScheduleZnver2.td | 122 def Zn2RCU : RetireControlUnit<192, 8>;
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H A D | X86ScheduleBdVer2.td | 82 def PdRCU : RetireControlUnit<128, 4>;
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H A D | X86ScheduleZnver3.td | 75 def Zn3RCU : RetireControlUnit<Znver3Model.MicroOpBufferSize, 8>;
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H A D | X86ScheduleZnver4.td | 71 def Zn4RCU : RetireControlUnit<Znver4Model.MicroOpBufferSize, 9>;
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/freebsd/lib/clang/libllvm/ |
H A D | Makefile | 969 SRCS_EXT+= MCA/HardwareUnits/RetireControlUnit.cpp
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