| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenDAGPatterns.h | 455 MVT::SimpleValueType getKnownType(unsigned ResNo) const;
692 ValueTypeByHwMode getType(unsigned ResNo) const { in getType() argument
693 return Types[ResNo].getValueTypeByHwMode(); in getType()
696 const TypeSetByHwMode &getExtType(unsigned ResNo) const { in getExtType() argument
697 return Types[ResNo]; in getExtType()
699 TypeSetByHwMode &getExtType(unsigned ResNo) { return Types[ResNo]; } in getExtType() argument
700 void setType(unsigned ResNo, const TypeSetByHwMode &T) { Types[ResNo] = T; } in setType() argument
701 MVT::SimpleValueType getSimpleType(unsigned ResNo) const { in getSimpleType() argument
702 return Types[ResNo].getMachineValueType().SimpleTy; in getSimpleType()
705 bool hasConcreteType(unsigned ResNo) const { in hasConcreteType() argument
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| H A D | CodeGenDAGPatterns.cpp | 1614 unsigned &ResNo) { in getOperandNum() argument
1617 ResNo = OpNo; in getOperandNum()
1641 unsigned ResNo = 0; // The result number being referenced. in ApplyTypeConstraint() local
1642 TreePatternNode &NodeToApply = getOperandNum(OperandNo, N, NodeInfo, ResNo); in ApplyTypeConstraint()
1648 return NodeToApply.UpdateNodeType(ResNo, VVT, TP); in ApplyTypeConstraint()
1651 return NodeToApply.UpdateNodeType(ResNo, MVT::iPTR, TP); in ApplyTypeConstraint()
1654 return TI.EnforceInteger(NodeToApply.getExtType(ResNo)); in ApplyTypeConstraint()
1657 return TI.EnforceFloatingPoint(NodeToApply.getExtType(ResNo)); in ApplyTypeConstraint()
1660 return TI.EnforceVector(NodeToApply.getExtType(ResNo)); in ApplyTypeConstraint()
1665 return (int)NodeToApply.UpdateNodeType(ResNo, OtherNode.getExtType(OResNo), in ApplyTypeConstraint()
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| H A D | DAGISelMatcher.h | 521 unsigned ResNo; variable
525 : Matcher(CheckType), Type(type), ResNo(resno) {} in CheckTypeMatcher()
528 unsigned getResNo() const { return ResNo; } in getResNo()
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| H A D | DAGISelMatcher.cpp | 183 OS << Indent << "CheckType " << getEnumName(Type) << ", ResNo=" << ResNo in printImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SDNodeDbgValue.h | 51 return u.s.ResNo; in getResNo()
72 static SDDbgOperand fromNode(SDNode *Node, unsigned ResNo) { in fromNode() argument
73 return SDDbgOperand(Node, ResNo); in fromNode()
107 unsigned ResNo; ///< Valid for expressions. member
117 u.s.ResNo = R; in SDDbgOperand()
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| H A D | LegalizeTypes.h | 225 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
304 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
305 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
310 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
347 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
361 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
362 SDValue PromoteIntRes_UADDSUBO_CARRY(SDNode *N, unsigned ResNo);
363 SDValue PromoteIntRes_SADDSUBO_CARRY(SDNode *N, unsigned ResNo);
367 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
455 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
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| H A D | LegalizeVectorTypes.cpp | 41 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { in ScalarizeVectorResult() argument
42 LLVM_DEBUG(dbgs() << "Scalarize node result " << ResNo << ": "; in ScalarizeVectorResult()
49 dbgs() << "ScalarizeVectorResult #" << ResNo << ": "; in ScalarizeVectorResult()
56 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break; in ScalarizeVectorResult()
142 R = ScalarizeVecRes_UnaryOpWithTwoResults(N, ResNo); in ScalarizeVectorResult()
227 R = ScalarizeVecRes_OverflowOp(N, ResNo); in ScalarizeVectorResult()
243 SetScalarizedVector(SDValue(N, ResNo), R); in ScalarizeVectorResult()
290 unsigned ResNo) { in ScalarizeVecRes_UnaryOpWithTwoResults() argument
305 unsigned OtherNo = 1 - ResNo; in ScalarizeVecRes_UnaryOpWithTwoResults()
315 return SDValue(ScalarNode, ResNo); in ScalarizeVecRes_UnaryOpWithTwoResults()
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| H A D | LegalizeFloatTypes.cpp | 51 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { in SoftenFloatResult() argument
52 LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG)); in SoftenFloatResult()
59 dbgs() << "SoftenFloatResult #" << ResNo << ": "; in SoftenFloatResult()
66 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break; in SoftenFloatResult()
71 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break; in SoftenFloatResult()
186 SetSoftenedFloat(SDValue(N, ResNo), R); in SoftenFloatResult()
248 unsigned ResNo) { in SoftenFloatRes_MERGE_VALUES() argument
249 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); in SoftenFloatRes_MERGE_VALUES()
295 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) { in SoftenFloatRes_EXTRACT_VECTOR_ELT() argument
1523 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) { in ExpandFloatResult() argument
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| H A D | InstrEmitter.h | 51 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
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| H A D | LegalizeTypesGeneric.cpp | 34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, in ExpandRes_MERGE_VALUES() argument
36 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); in ExpandRes_MERGE_VALUES()
519 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, in SplitRes_MERGE_VALUES() argument
521 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); in SplitRes_MERGE_VALUES()
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| H A D | InstrEmitter.cpp | 84 void InstrEmitter::EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, in EmitCopyFromReg() argument
89 SDValue Op(Node, ResNo); in EmitCopyFromReg()
102 MVT VT = Node->getSimpleValueType(ResNo); in EmitCopyFromReg()
112 User->getOperand(2).getResNo() == ResNo) { in EmitCopyFromReg()
122 if (Op.getNode() != Node || Op.getResNo() != ResNo) in EmitCopyFromReg()
177 SDValue Op(Node, ResNo); in EmitCopyFromReg()
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| H A D | LegalizeIntegerTypes.cpp | 41 void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) { in PromoteIntegerResult() argument
46 if (CustomLowerNode(N, N->getValueType(ResNo), true)) { in PromoteIntegerResult()
54 dbgs() << "PromoteIntegerResult #" << ResNo << ": "; in PromoteIntegerResult()
58 case ISD::MERGE_VALUES:Res = PromoteIntRes_MERGE_VALUES(N, ResNo); break; in PromoteIntegerResult()
234 case ISD::SSUBO: Res = PromoteIntRes_SADDSUBO(N, ResNo); break; in PromoteIntegerResult()
236 case ISD::USUBO: Res = PromoteIntRes_UADDSUBO(N, ResNo); break; in PromoteIntegerResult()
238 case ISD::UMULO: Res = PromoteIntRes_XMULO(N, ResNo); break; in PromoteIntegerResult()
243 case ISD::USUBO_CARRY: Res = PromoteIntRes_UADDSUBO_CARRY(N, ResNo); break; in PromoteIntegerResult()
246 case ISD::SSUBO_CARRY: Res = PromoteIntRes_SADDSUBO_CARRY(N, ResNo); break; in PromoteIntegerResult()
299 Res = PromoteIntRes_AtomicCmpSwap(cast<AtomicSDNode>(N), ResNo); in PromoteIntegerResult()
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| H A D | LegalizeTypes.cpp | 978 SDValue DAGTypeLegalizer::DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) { in DisintegrateMERGE_VALUES() argument
980 if (i != ResNo) in DisintegrateMERGE_VALUES()
982 return SDValue(N->getOperand(ResNo)); in DisintegrateMERGE_VALUES()
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| H A D | ScheduleDAGSDNodes.cpp | 126 unsigned ResNo = User->getOperand(2).getResNo(); in CheckForPhysRegDependency() local
132 if (ResNo >= II.getNumDefs() && II.hasImplicitDefOfPhysReg(Reg)) in CheckForPhysRegDependency()
138 TRI->getMinimalPhysRegClass(Reg, Def->getSimpleValueType(ResNo)); in CheckForPhysRegDependency()
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| H A D | SelectionDAG.cpp | 2555 unsigned ResNo = StoreValue.getResNo(); in expandMultipleResultFPLibCall() local
2557 if (CallRetResNo == ResNo) in expandMultipleResultFPLibCall()
2575 ResultStores[ResNo] = ST; in expandMultipleResultFPLibCall()
2597 for (auto [ResNo, ST] : llvm::enumerate(ResultStores)) { in expandMultipleResultFPLibCall()
2598 if (ResNo == CallRetResNo) in expandMultipleResultFPLibCall()
2600 EVT ResVT = Node->getValueType(ResNo); in expandMultipleResultFPLibCall()
2602 ResultPtrs[ResNo] = ResultPtr; in expandMultipleResultFPLibCall()
2627 for (auto [ResNo, ResultPtr] : llvm::enumerate(ResultPtrs)) { in expandMultipleResultFPLibCall()
2628 if (ResNo == CallRetResNo) { in expandMultipleResultFPLibCall()
2634 getLoad(Node->getValueType(ResNo), DL, CallChain, ResultPtr, PtrInfo); in expandMultipleResultFPLibCall()
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| H A D | TargetLowering.cpp | 5912 unsigned ResNo = 0; // ResNo - The result number of the next output. in ParseConstraints() local
5939 getAsmOperandValueType(DL, STy->getElementType(ResNo)) in ParseConstraints()
5942 assert(ResNo == 0 && "Asm only has one result!"); in ParseConstraints()
5946 ++ResNo; in ParseConstraints()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 151 unsigned ResNo = 0; // Which return value of the node we are using.
158 unsigned getResNo() const { return ResNo; }
169 return Node == O.Node && ResNo == O.ResNo;
175 return std::tie(Node, ResNo) < std::tie(O.Node, O.ResNo);
244 V.ResNo = -1U;
250 V.ResNo = -2U;
1104 EVT getValueType(unsigned ResNo) const {
1105 assert(ResNo < NumValues && "Illegal result number!");
1106 return ValueList[ResNo];
1110 MVT getSimpleValueType(unsigned ResNo) const {
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| H A D | SDPatternMatch.h | 111 template <unsigned ResNo, typename Pattern> struct Result_match {
118 return N.getResNo() == ResNo && P.match(Ctx, N); in match()
123 template <unsigned ResNo, typename Pattern>
124 inline Result_match<ResNo, Pattern> m_Result(const Pattern &P) { in m_Result()
125 return Result_match<ResNo, Pattern>(P); in m_Result()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 236 unsigned ResNo = 0; // ResNo - The result number of the next output. in lowerInlineAsm() local
273 TLI->getSimpleValueType(DL, STy->getElementType(ResNo)); in lowerInlineAsm()
275 assert(ResNo == 0 && "Asm only has one result!"); in lowerInlineAsm()
279 ++ResNo; in lowerInlineAsm()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | DAGISelMatcherGen.cpp | 1065 for (unsigned ResNo = 0; ResNo < Pattern.getDstPattern().getNumResults(); in EmitResultCode() local
1066 ++ResNo) { in EmitResultCode()
1067 Results[ResNo] = Ops[Pattern.getDstPattern().getResultIndex(ResNo)]; in EmitResultCode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 15615 unsigned ResNo = Op0.getResNo(); in PerformExtractEltToVMOVRRD() local
15625 V->getOperand(0).getResNo() == ResNo; in PerformExtractEltToVMOVRRD()
16509 unsigned ResNo = Use.getResNo(); in CombineVLDDUP() local
16511 if (ResNo == NumVecs) in CombineVLDDUP()
16513 DCI.CombineTo(Use.getUser(), SDValue(VLDDup.getNode(), ResNo)); in CombineVLDDUP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 17680 unsigned ResNo = User->getOperand(Op).getResNo(); in checkForPhysRegDependency() local
17681 if (User->getOperand(Op)->getValueType(ResNo) != MVT::i1) in checkForPhysRegDependency()
17687 TRI->getMinimalPhysRegClass(PhysReg, Def->getSimpleValueType(ResNo)); in checkForPhysRegDependency()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47152 unsigned ResNo = InputVector.getResNo(); in combineExtractVectorElt() local
47153 auto IsBoolExtract = [&BoolExtracts, &ResNo, &IsVar](SDNode *Use) { in combineExtractVectorElt()
47155 Use->getOperand(0).getResNo() == ResNo && in combineExtractVectorElt()
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