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Searched refs:RegsToPass (Results 1 – 25 of 29) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp296 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCall() local
325 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
353 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
354 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
355 RegsToPass[i].second, Glue); in LowerCall()
378 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
379 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
380 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp332 std::deque<std::pair<unsigned, SDValue>> RegsToPass; in LowerCall() local
342 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
384 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall()
385 unsigned Reg = RegsToPass[I].first; in LowerCall()
386 Chain = DAG.getCopyToReg(Chain, DL, Reg, RegsToPass[I].second, Glue); in LowerCall()
433 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall()
434 unsigned Reg = RegsToPass[I].first; in LowerCall()
435 Ops.push_back(DAG.getRegister(Reg, RegsToPass[I].second.getValueType())); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp714 SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA, in Passv64i1ArgInRegs() argument
730 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo)); in Passv64i1ArgInRegs()
731 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi)); in Passv64i1ArgInRegs()
2141 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
2223 Passv64i1ArgInRegs(dl, DAG, Arg, RegsToPass, VA, ArgLocs[++I], Subtarget); in LowerCall()
2225 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2240 RegsToPass.push_back(std::make_pair(ShadowReg, Arg)); in LowerCall()
2263 RegsToPass.push_back(std::make_pair( in LowerCall()
2303 RegsToPass.push_back(std::make_pair(Register(X86::AL), in LowerCall()
2312 RegsToPass.push_back(std::make_pair(F.PReg, Val)); in LowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16ISelLowering.h48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
H A DMips16ISelLowering.cpp410 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, in getOpndList()
489 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); in getOpndList()
497 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); in getOpndList()
502 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
409 getOpndList(SmallVectorImpl<SDValue> & Ops,std::deque<std::pair<unsigned,SDValue>> & RegsToPass,bool IsPICCall,bool GlobalOrExternal,bool InternalLinkage,bool IsCallReloc,CallLoweringInfo & CLI,SDValue Callee,SDValue Chain) const getOpndList() argument
H A DMipsSEISelLowering.h69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsISelLowering.h493 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
583 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsISelLowering.cpp3064 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in getOpndList() argument
3081 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty))); in getOpndList()
3090 for (auto &R : RegsToPass) { in getOpndList()
3097 for (auto &R : RegsToPass) in getOpndList()
3285 std::deque<std::pair<unsigned, SDValue>> RegsToPass; in LowerCall() local
3309 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg, in LowerCall()
3338 RegsToPass.push_back(std::make_pair(LocRegLo, Lo)); in LowerCall()
3339 RegsToPass.push_back(std::make_pair(LocRegHigh, Hi)); in LowerCall()
3378 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3489 getOpndList(Ops, RegsToPass, IsPIC, GlobalOrExternal, InternalLinkage, in LowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp658 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
692 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
720 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCCCCallTo()
721 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCCCCallTo()
722 RegsToPass[I].second, InGlue); in LowerCCCCallTo()
753 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCCCCallTo()
754 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCCCCallTo()
755 RegsToPass[I].second.getValueType())); in LowerCCCCallTo()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp886 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32() local
980 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Part0)); in LowerCall_32()
984 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Part1)); in LowerCall_32()
1015 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
1019 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
1044 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32()
1045 Register Reg = RegsToPass[i].first; in LowerCall_32()
1048 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InGlue); in LowerCall_32()
1071 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32()
1072 Register Reg = RegsToPass[i].first; in LowerCall_32()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp823 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
851 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
890 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
891 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
892 RegsToPass[i].second, InGlue); in LowerCCCCallTo()
912 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
913 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
914 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp451 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; in LowerCall() local
477 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
487 for (auto &Reg : RegsToPass) { in LowerCall()
513 for (auto &Reg : RegsToPass) in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp568 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
586 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
600 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); in LowerCall()
613 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
639 for (auto &Reg : RegsToPass) { in LowerCall()
682 for (auto &Reg : RegsToPass) in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1045 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
1071 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
1094 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
1095 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
1096 RegsToPass[i].second, InGlue); in LowerCCCCallTo()
1119 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
1120 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
1121 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp630 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
682 RegsToPass.push_back(std::make_pair(VE::SX12, Callee)); in LowerCall()
722 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
749 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
750 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall()
751 RegsToPass[i].second, InGlue); in LowerCall()
758 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
759 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
760 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp631 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
681 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
704 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall()
771 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
772 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall()
773 RegsToPass[i].second, InGlue); in LowerCall()
830 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
831 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
832 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp5704 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, in buildCallOperands() argument
5756 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in buildCallOperands()
5757 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in buildCallOperands()
5758 RegsToPass[i].second.getValueType())); in buildCallOperands()
5785 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue, in FinishCall() argument
5808 buildCallOperands(Ops, CFlags, dl, DAG, RegsToPass, Glue, Chain, Callee, in FinishCall()
6081 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32SVR4() local
6148 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0))); in LowerCall_32SVR4()
6151 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(), in LowerCall_32SVR4()
6154 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32SVR4()
[all …]
H A DPPCISelLowering.h1349 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1519 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
1558 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1594 for (auto Reg : RegsToPass) { in LowerCall()
1607 for (auto Reg : RegsToPass) { in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp457 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; in LowerCall() local
518 // Arguments that can be passed on register must be kept at RegsToPass in LowerCall()
521 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
546 for (const auto &R : RegsToPass) { in LowerCall()
562 for (const auto &R : RegsToPass) { in LowerCall()
590 for (const auto &R : RegsToPass) in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h796 SDValue &Arg, RegsToPassVector &RegsToPass,
H A DARMISelLowering.cpp2329 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
2338 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); in PassF64ArgInRegs()
2341 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); in PassF64ArgInRegs()
2490 RegsToPassVector RegsToPass; in LowerCall() local
2561 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2566 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2577 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2591 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2616 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
2662 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h401 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1932 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; in LowerCall() local
1984 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
2012 RegsToPass.push_back(std::make_pair(SystemZ::R3D, ShadowArgValue)); in LowerCall()
2036 RegsToPass.push_back(std::make_pair( in LowerCall()
2053 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall()
2054 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCall()
2055 RegsToPass[I].second, Glue); in LowerCall()
2066 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCall()
2067 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCall()
2068 RegsToPass[I].second.getValueType())); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp5331 SmallVector<std::pair<Register, SDValue>> RegsToPass; in LowerCall() local
5392 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
5418 for (auto &Reg : RegsToPass) { in LowerCall()
5446 for (auto &Reg : RegsToPass) in LowerCall()

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