Lines Matching refs:RegsToPass
714 SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA, in Passv64i1ArgInRegs() argument
730 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo)); in Passv64i1ArgInRegs()
731 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi)); in Passv64i1ArgInRegs()
2141 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
2223 Passv64i1ArgInRegs(dl, DAG, Arg, RegsToPass, VA, ArgLocs[++I], Subtarget); in LowerCall()
2225 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2240 RegsToPass.push_back(std::make_pair(ShadowReg, Arg)); in LowerCall()
2263 RegsToPass.push_back(std::make_pair( in LowerCall()
2303 RegsToPass.push_back(std::make_pair(Register(X86::AL), in LowerCall()
2312 RegsToPass.push_back(std::make_pair(F.PReg, Val)); in LowerCall()
2391 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
2392 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
2393 RegsToPass[i].second, InGlue); in LowerCall()
2433 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
2434 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
2435 RegsToPass[i].second.getValueType())); in LowerCall()
2487 for (auto const &RegPair : RegsToPass) in LowerCall()