Home
last modified time | relevance | path

Searched refs:RegReg (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.h25 RegReg, // SH1ADD/SH2ADD/SH3ADD enumerator
H A DRISCVMatInt.cpp449 case RISCVMatInt::RegReg: in generateMCInstSeq()
533 return RISCVMatInt::RegReg; in getOpndKind()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp344 RegReg, enumerator
406 struct RegRegOp RegReg; member
447 case KindTy::RegReg: in RISCVOperand()
448 RegReg = o.RegReg; in RISCVOperand()
474 bool isRegReg() const { return Kind == KindTy::RegReg; } in isRegReg()
1097 case KindTy::RegReg: in print()
1098 OS << "<RegReg: Reg1 " << RegName(RegReg.Reg1); in print()
1099 OS << " Reg2 " << RegName(RegReg.Reg2); in print()
1186 auto Op = std::make_unique<RISCVOperand>(KindTy::RegReg); in createRegReg()
1187 Op->RegReg.Reg1 = Reg1No; in createRegReg()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp965 case RISCVMatInt::RegReg: in materializeImm()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoXCV.td510 let Name = "RegReg";
H A DRISCVInstrInfo.cpp823 case RISCVMatInt::RegReg: in movImm()
H A DRISCVISelDAGToDAG.cpp189 case RISCVMatInt::RegReg: in selectImmSeq()