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Searched refs:RegI (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DCalledValuePropagation.cpp249 auto RegI = CVPLatticeKey(I.getReturnValue(), IPOGrouping::Register); in visitReturn() local
252 MergeValues(SS.getValueState(RegI), SS.getValueState(RetF)); in visitReturn()
264 auto RegI = CVPLatticeKey(&CB, IPOGrouping::Register); in visitCallBase() local
277 ChangedValues[RegI] = getOverdefinedVal(); in visitCallBase()
298 ChangedValues[RegI] = in visitCallBase()
299 MergeValues(SS.getValueState(RegI), SS.getValueState(RetF)); in visitCallBase()
308 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitSelect() local
311 ChangedValues[RegI] = in visitSelect()
321 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitLoad() local
324 ChangedValues[RegI] = in visitLoad()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp372 auto RegI = getSavedReg(CSI, Which); in assignCalleeSavedSpillSlots() local
373 if (RegI == CSI.end() || RegI->getFrameIdx() == 0) { in assignCalleeSavedSpillSlots()
377 if (RegI != CSI.end()) in assignCalleeSavedSpillSlots()
378 RegI->setFrameIdx(FI); in assignCalleeSavedSpillSlots()
380 MFI.setObjectOffset(RegI->getFrameIdx(), CurOffset); in assignCalleeSavedSpillSlots()
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCWin64EH.cpp1023 unsigned RegI = 0, RegF = 0; in tryARM64PackedUnwind() local
1063 RegI = 2; in tryARM64PackedUnwind()
1071 RegI += 1; in tryARM64PackedUnwind()
1093 if (Location != IntRegs || Inst.Offset != 8 * RegI || in tryARM64PackedUnwind()
1094 Inst.Register != 19 + RegI) in tryARM64PackedUnwind()
1096 RegI += 2; in tryARM64PackedUnwind()
1099 if (Location != IntRegs || Inst.Offset != 8 * RegI) in tryARM64PackedUnwind()
1101 if (Inst.Register == 19 + RegI) in tryARM64PackedUnwind()
1102 RegI += 1; in tryARM64PackedUnwind()
1111 if (Location != IntRegs || Inst.Offset != 8 * RegI || in tryARM64PackedUnwind()
[all …]
/freebsd/contrib/llvm-project/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.cpp1389 SW.printNumber("RegI", RF.RegI()); in dumpPackedARM64Entry()
1399 int IntSZ = 8 * RF.RegI(); in dumpPackedARM64Entry()
1426 if (RF.RegI() > 0 || RF.RegF() > 0 || RF.CR() == 1) { in dumpPackedARM64Entry()
1441 } else if (I == 0 && RF.RegI() == 0 && RF.CR() != 1) { in dumpPackedARM64Entry()
1449 if (RF.CR() == 1 && (RF.RegI() % 2) == 0) { in dumpPackedARM64Entry()
1450 if (RF.RegI() == 0) in dumpPackedARM64Entry()
1455 for (int I = (RF.RegI() + 1) / 2 - 1; I >= 0; I--) { in dumpPackedARM64Entry()
1456 if (I == (RF.RegI() + 1) / 2 - 1 && RF.RegI() % 2 == 1) { in dumpPackedARM64Entry()
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DARMWinEH.h265 uint8_t RegI() const { in RegI() function
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.cpp1844 for (_Iterator RegI = First; RegI != End; ++RegI) { in fillVgprSgprCost() local
1845 Register Reg = *RegI; in fillVgprSgprCost()
H A DSIRegisterInfo.cpp781 for (unsigned RegI = AMDGPU::VGPR0, RegE = AMDGPU::VGPR0 + MaxNumVGPRs; in getReservedRegs() local
782 RegI < RegE; ++RegI) { in getReservedRegs()
783 if (NonWWMRegMask.test(RegI)) in getReservedRegs()
784 reserveRegisterTuples(Reserved, RegI); in getReservedRegs()