Searched refs:RegF (Results 1 – 4 of 4) sorted by relevance
822 unsigned RegI = 0, RegF = 0; in tryARM64PackedUnwind() 884 // RegI=10/RegF=8/CR=1/H=1, we end up with SavSZ = 216, which should in tryARM64PackedUnwind() 922 if (Location != FloatRegs || RegF == 0 || Inst.Register != 8 + RegF || in tryARM64PackedUnwind() 923 Inst.Offset != 8 * (RegI + (StandaloneLR ? 1 : 0) + RegF)) in tryARM64PackedUnwind() 925 RegF += 1; in tryARM64PackedUnwind() 932 RegF = 2; in tryARM64PackedUnwind() 937 Inst.Register != 8 + RegF || in tryARM64PackedUnwind() 938 Inst.Offset != 8 * (RegI + (StandaloneLR ? 1 : 0) + RegF)) in tryARM64PackedUnwind() 940 RegF in tryARM64PackedUnwind() 814 unsigned RegI = 0, RegF = 0; tryARM64PackedUnwind() local [all...]
306 auto RegF = CVPLatticeKey(I.getFalseValue(), IPOGrouping::Register); in visitSelect() local308 MergeValues(SS.getValueState(RegT), SS.getValueState(RegF)); in visitSelect()
1335 SW.printNumber("RegF", RF.RegF()); in dumpPackedARM64Entry() 1349 int FpSZ = 8 * RF.RegF(); in dumpPackedARM64Entry() 1350 if (RF.RegF()) in dumpPackedARM64Entry() 1373 if (RF.RegI() > 0 || RF.RegF() > 0 || RF.CR() == 1) { in dumpPackedARM64Entry() 1376 // This case isn't documented; if neither RegI nor RegF nor CR=1 in dumpPackedARM64Entry() 1382 int FloatRegs = RF.RegF() > 0 ? RF.RegF() + 1 : 0; in dumpPackedARM64Entry()
258 uint8_t RegF() const { in RegF() function