| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 141 bool regsAreCompatible(Register RegA, Register RegB) const;
150 bool isProfitableToCommute(Register RegA, Register RegB, Register RegC,
156 bool isProfitableToConv3Addr(Register RegA, Register RegB);
160 Register RegB, unsigned &Dist);
545 Register RegB) const { in regsAreCompatible()
546 if (RegA == RegB) in regsAreCompatible()
548 if (!RegA || !RegB) in regsAreCompatible()
550 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
634 Register RegB, in isProfitableToCommute() argument
674 MCRegister FromRegB = getMappedReg(RegB, SrcRegMap); in isProfitableToCommute()
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| H A D | ImplicitNullChecks.cpp | 291 Register RegB = MOB.getReg(); in canReorder() local
293 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
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| H A D | TargetInstrInfo.cpp | 1100 Register RegB = OpB.getReg(); in reassociateOps() local
1107 if (RegB.isVirtual()) in reassociateOps()
1108 MRI.constrainRegClass(RegB, RC); in reassociateOps()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 468 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister() argument
469 return isSuperRegister(RegB, RegA); in isSubRegister()
473 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
476 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq() argument
477 return isSuperRegisterEq(RegB, RegA); in isSubRegisterEq()
482 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq() argument
483 return RegA == RegB || isSuperRegister(RegA, RegB); in isSuperRegisterEq()
488 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq() argument
489 return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); in isSuperOrSubRegisterEq()
493 bool regsOverlap(MCRegister RegA, MCRegister RegB) const;
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 207 bool MCRegisterInfo::regsOverlap(MCRegister RegA, MCRegister RegB) const { in regsOverlap()
211 auto RangeB = regunits(RegB); in regsOverlap()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 449 bool regsOverlap(Register RegA, Register RegB) const { in regsOverlap() argument
450 if (RegA == RegB) in regsOverlap()
452 if (RegA.isPhysical() && RegB.isPhysical()) in regsOverlap()
453 return MCRegisterInfo::regsOverlap(RegA.asMCReg(), RegB.asMCReg()); in regsOverlap()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 674 auto IsSubReg = [&](MCRegister RegA, MCRegister RegB) { in isArgumentRegister() argument
675 return TRI.isSuperOrSubRegisterEq(RegA, RegB); in isArgumentRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 500 Register RegB = Root.getOperand(AddOpIdx).getReg(); in getFMAPatterns() local
501 MachineInstr *Prev = MRI->getUniqueVRegDef(RegB); in getFMAPatterns()
859 RegA21, RegB; in reassociateFMA() local
864 GetFMAInstrInfo(Root, RegM31, RegM32, RegB, KillM31, KillM32, KillB); in reassociateFMA()
1014 .addReg(RegB, getKillRegState(RegB)) in reassociateFMA()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2225 for (auto &RegB : UsesB) { in isDependent() local
2227 if (RegA == RegB) in isDependent()
2230 if (RegA.isPhysical() && llvm::is_contained(HRI.subregs(RegA), RegB)) in isDependent()
2233 if (RegB.isPhysical() && llvm::is_contained(HRI.subregs(RegB), RegA)) in isDependent()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6940 Register RegB = AddMI->getOperand(IdxOpd1).getReg(); in genSubAdd2SubSub() local
6962 .addReg(RegB, getKillRegState(RegBIsKill)) in genSubAdd2SubSub()
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