| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 141 bool regsAreCompatible(Register RegA, Register RegB) const;
150 bool isProfitableToCommute(Register RegA, Register RegB, Register RegC,
156 bool isProfitableToConv3Addr(Register RegA, Register RegB);
160 Register RegB, unsigned &Dist);
548 Register RegB) const { in regsAreCompatible()
549 if (RegA == RegB) in regsAreCompatible()
551 if (!RegA || !RegB) in regsAreCompatible()
553 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
637 Register RegB, in isProfitableToCommute() argument
677 MCRegister FromRegB = getMappedReg(RegB, SrcRegMap); in isProfitableToCommute()
[all …]
|
| H A D | ImplicitNullChecks.cpp | 290 Register RegB = MOB.getReg(); in canReorder() local
292 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
|
| H A D | TargetInstrInfo.cpp | 1332 Register RegB = OpB.getReg(); in reassociateOps() local
1339 if (RegB.isVirtual()) in reassociateOps()
1340 MRI.constrainRegClass(RegB, RC); in reassociateOps()
|
| H A D | MachinePipeliner.cpp | 3043 Register RegB = BaseOpB->getReg(), RegO = BaseOpO->getReg(); in mayOverlapInLaterIter() local
3044 if (!RegB.isVirtual() || !RegO.isVirtual()) in mayOverlapInLaterIter()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 484 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister() argument
485 return isSuperRegister(RegB, RegA); in isSubRegister()
489 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
492 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq() argument
493 return isSuperRegisterEq(RegB, RegA); in isSubRegisterEq()
498 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq() argument
499 return RegA == RegB || isSuperRegister(RegA, RegB); in isSuperRegisterEq()
504 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq() argument
505 return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); in isSuperOrSubRegisterEq()
509 bool regsOverlap(MCRegister RegA, MCRegister RegB) const;
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 211 bool MCRegisterInfo::regsOverlap(MCRegister RegA, MCRegister RegB) const { in regsOverlap()
215 auto RangeB = regunits(RegB); in regsOverlap()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 462 bool regsOverlap(Register RegA, Register RegB) const { in regsOverlap() argument
463 if (RegA == RegB) in regsOverlap()
465 if (RegA.isPhysical() && RegB.isPhysical()) in regsOverlap()
466 return MCRegisterInfo::regsOverlap(RegA.asMCReg(), RegB.asMCReg()); in regsOverlap()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 686 auto IsSubReg = [&](MCRegister RegA, MCRegister RegB) { in isArgumentRegister() argument
687 return TRI.isSuperOrSubRegisterEq(RegA, RegB); in isArgumentRegister()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2228 for (auto &RegB : UsesB) { in isDependent() local
2230 if (RegA == RegB) in isDependent()
2233 if (RegA.isPhysical() && llvm::is_contained(HRI.subregs(RegA), RegB)) in isDependent()
2236 if (RegB.isPhysical() && llvm::is_contained(HRI.subregs(RegB), RegA)) in isDependent()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 498 Register RegB = Root.getOperand(AddOpIdx).getReg(); in getFMAPatterns() local
499 MachineInstr *Prev = MRI->getUniqueVRegDef(RegB); in getFMAPatterns()
857 RegA21, RegB; in reassociateFMA() local
862 GetFMAInstrInfo(Root, RegM31, RegM32, RegB, KillM31, KillM32, KillB); in reassociateFMA()
1012 .addReg(RegB, getKillRegState(RegB)) in reassociateFMA()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 7735 Register RegB = AddMI->getOperand(IdxOpd1).getReg(); in genSubAdd2SubSub() local
7758 .addReg(RegB, getKillRegState(RegBIsKill)) in genSubAdd2SubSub()
|