Searched refs:RdLo (Results 1 – 5 of 5) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrInfo.td | 4301 bits<4> RdLo; 4306 let Inst{15-12} = RdLo; 4313 bits<4> RdLo; 4318 let Inst{15-12} = RdLo; 4384 def SMULL : AsMul1I64<0b0000110, (outs GPR:$RdLo, GPR:$RdHi), 4386 "smull", "\t$RdLo, $RdHi, $Rn, $Rm", 4387 [(set GPR:$RdLo, GPR:$RdHi, 4392 def UMULL : AsMul1I64<0b0000100, (outs GPR:$RdLo, GPR:$RdHi), 4394 "umull", "\t$RdLo, $RdHi, $Rn, $Rm", 4395 [(set GPR:$RdLo, GPR:$RdHi, [all …]
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H A D | ARMInstrThumb2.td | 687 : T2I<(outs rGPR:$RdLo, rGPR:$RdHi), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64, 688 opc, "\t$RdLo, $RdHi, $Rn, $Rm", pattern>, 690 bits<4> RdLo; 698 let Inst{15-12} = RdLo; 704 : T2I<(outs rGPR:$RdLo, rGPR:$RdHi), 706 opc, "\t$RdLo, $RdHi, $Rn, $Rm", []>, 707 RegConstraint<"$RLo = $RdLo, $RHi = $RdHi">, 709 bits<4> RdLo; 717 let Inst{15-12} = RdLo; 3070 [(set rGPR:$RdLo, rGPR:$RdHi, [all …]
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H A D | ARMInstrFormats.td | 1028 bits<4> RdLo; 1031 let Inst{15-12} = RdLo;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrAtomics.td | 513 let Constraints = "@earlyclobber $RdLo,@earlyclobber $RdHi,@earlyclobber $scratch", 515 class cmp_swap_128 : Pseudo<(outs GPR64common:$RdLo, GPR64common:$RdHi,
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 8512 unsigned RdLo = Inst.getOperand(1).getReg(); in validateInstruction() local 8513 if(RdHi == RdLo) { in validateInstruction()
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