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Searched refs:RdLo (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.td4319 bits<4> RdLo;
4324 let Inst{15-12} = RdLo;
4331 bits<4> RdLo;
4336 let Inst{15-12} = RdLo;
4402 def SMULL : AsMul1I64<0b0000110, (outs GPR:$RdLo, GPR:$RdHi),
4404 "smull", "\t$RdLo, $RdHi, $Rn, $Rm",
4405 [(set GPR:$RdLo, GPR:$RdHi,
4410 def UMULL : AsMul1I64<0b0000100, (outs GPR:$RdLo, GPR:$RdHi),
4412 "umull", "\t$RdLo, $RdHi, $Rn, $Rm",
4413 [(set GPR:$RdLo, GPR:$RdHi,
[all …]
H A DARMInstrThumb2.td687 : T2I<(outs rGPR:$RdLo, rGPR:$RdHi), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64,
688 opc, "\t$RdLo, $RdHi, $Rn, $Rm", pattern>,
690 bits<4> RdLo;
698 let Inst{15-12} = RdLo;
704 : T2I<(outs rGPR:$RdLo, rGPR:$RdHi),
706 opc, "\t$RdLo, $RdHi, $Rn, $Rm", []>,
707 RegConstraint<"$RLo = $RdLo, $RHi = $RdHi">,
709 bits<4> RdLo;
717 let Inst{15-12} = RdLo;
3077 [(set rGPR:$RdLo, rGPR:$RdHi,
[all …]
H A DARMInstrFormats.td1020 bits<4> RdLo;
1023 let Inst{15-12} = RdLo;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td517 let Constraints = "@earlyclobber $RdLo,@earlyclobber $RdHi,@earlyclobber $scratch",
519 class cmp_swap_128 : Pseudo<(outs GPR64common:$RdLo, GPR64common:$RdHi,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp8549 MCRegister RdLo = Inst.getOperand(1).getReg(); in validateInstruction() local
8550 if(RdHi == RdLo) { in validateInstruction()