| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.cpp | 152 unsigned Ra) { in addIntraChainConstraint() argument 153 if (Rd == Ra) in addIntraChainConstraint() 158 if (Register::isPhysicalRegister(Rd) || Register::isPhysicalRegister(Ra)) { in addIntraChainConstraint() 162 << Register::isPhysicalRegister(Ra) << '\n'); in addIntraChainConstraint() 167 PBQPRAGraph::NodeId node2 = G.getMetadata().getNodeIdForVReg(Ra); in addIntraChainConstraint() 180 const LiveInterval &la = LIs.getInterval(Ra); in addIntraChainConstraint() 236 unsigned Ra) { in addInterChainConstraint() argument 240 if (Chains.count(Ra)) { in addInterChainConstraint() 241 if (Rd != Ra) { in addInterChainConstraint() 242 LLVM_DEBUG(dbgs() << "Moving acc chain from " << printReg(Ra, TRI) in addInterChainConstraint() [all …]
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| H A D | AArch64PBQPRegAlloc.h | 32 bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); 35 void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
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| H A D | AArch64InstrInfo.td | 2801 def : Pat<(i64 (add (mul (sext GPR32:$Rn), (s64imm_32bit:$C)), GPR64:$Ra)), 2802 (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 2803 def : Pat<(i64 (add (mul (zext GPR32:$Rn), (i64imm_32bit:$C)), GPR64:$Ra)), 2804 (UMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 2806 GPR64:$Ra)), 2808 (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 2810 def : Pat<(i64 (sub GPR64:$Ra, (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))), 2811 (SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 2812 def : Pat<(i64 (sub GPR64:$Ra, (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))), 2813 (UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; [all …]
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| H A D | AArch64InstrFormats.td | 2733 : I<(outs addtype:$Rd), (ins multype:$Rn, multype:$Rm, addtype:$Ra), 2734 asm, "\t$Rd, $Rn, $Rm, $Ra", "", pattern> { 2738 bits<5> Ra; 2743 let Inst{14-10} = Ra; 2764 [(set GPR64:$Rd, (AccNode GPR64:$Ra, 2787 // The Ra field of SMULH and UMULH is unused: it should be assembled as 31 5837 : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm, regtype: $Ra), 5838 asm, "\t$Rd, $Rn, $Rm, $Ra", "", pat>, 5843 bits<5> Ra; 5848 let Inst{14-10} = Ra; [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 159 MCRegister Ra; in expandFunctionCall() local 162 Ra = RISCVII::getTailExpandUseRegNo(STI.getFeatureBits()); in expandFunctionCall() 165 Ra = MI.getOperand(0).getReg(); in expandFunctionCall() 168 Ra = RISCV::X1; in expandFunctionCall() 171 Ra = MI.getOperand(0).getReg(); in expandFunctionCall() 180 TmpInst = MCInstBuilder(RISCV::AUIPC).addReg(Ra).addExpr(CallExpr); in expandFunctionCall() 187 TmpInst = MCInstBuilder(RISCV::JALR).addReg(RISCV::X0).addReg(Ra).addImm(0); in expandFunctionCall() 190 TmpInst = MCInstBuilder(RISCV::JALR).addReg(Ra).addReg(Ra).addImm(0); in expandFunctionCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 90 Register Ra = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ() local 93 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::FLS_f_rr), Ra) in expandCTLZ() 98 .addReg(Ra); in expandCTLZ()
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| /freebsd/crypto/openssl/crypto/ec/asm/ |
| H A D | ecp_nistz256-x86_64.pl | 2560 my ($ONE,$INDEX,$Ra,$Rb,$Rc,$Rd,$Re,$Rf)=map("%xmm$_",(0..7)); 2623 pxor $Ra, $Ra 2650 por $T0a, $Ra 2664 movdqu $Ra, 16*0($val) 2743 pxor $Ra, $Ra 2764 por $T0a, $Ra 2775 movdqu $Ra, 16*0($val) 2802 my ($TWO,$INDEX,$Ra,$Rb,$Rc)=map("%ymm$_",(0..4)); 2835 vpxor $Ra, $Ra, $Ra 2843 vpermd $INDEX, $Ra, $INDEX [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.td | 4082 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra), 4084 "\t$Rd, $Rn, $Rm, $Ra", 4085 [(set GPR:$Rd, (int_arm_usada8 GPR:$Rn, GPR:$Rm, GPR:$Ra))]>, 4090 bits<4> Ra; 4094 let Inst{15-12} = Ra; 4366 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra), 4367 IIC_iMAC32, "mla", "\t$Rd, $Rn, $Rm, $Ra", 4368 [(set GPRnopc:$Rd, (add (mul GPRnopc:$Rn, GPRnopc:$Rm), GPRnopc:$Ra))]>, 4371 bits<4> Ra; 4372 let Inst{15-12} = Ra; [all …]
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| H A D | ARMInstrThumb2.td | 677 bits<4> Ra; 680 let Inst{15-12} = Ra; 2690 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary, 2691 "usada8", "\t$Rd, $Rn, $Rm, $Ra", 2692 [(set rGPR:$Rd, (int_arm_usada8 rGPR:$Rn, rGPR:$Rm, rGPR:$Ra))]>, 3051 let Inst{15-12} = 0b1111; // Ra = 0b1111 (no accumulate) 3056 : T2FourReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, 3057 opc, "\t$Rd, $Rn, $Rm, $Ra", pattern>, 3068 rGPR:$Ra))]>; 3070 [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, [all …]
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| H A D | ARMInstrFormats.td | 979 // MSW multiple w/ Ra operand 983 bits<4> Ra; 984 let Inst{15-12} = Ra; 1009 // AMulxyI with Ra operand 1013 bits<4> Ra; 1014 let Inst{15-12} = Ra;
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| /freebsd/tools/regression/iscsi/ |
| H A D | iscsi-test.sh | 152 check iscsictl -Ra 764 check iscsictl -Ra
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| /freebsd/contrib/tzdata/ |
| H A D | southamerica | 1729 # From Carlos Raúl Perasso via Jesper Nørgaard Welen (2006-10-13) 1733 # From Carlos Raúl Perasso (2010-02-18): 1751 # From Carlos Raúl Perasso (2013-03-15): 1754 # From Carlos Raúl Perasso (2014-02-28): 1761 # From Carlos Raúl Perasso (2023-07-27):
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| H A D | NEWS | 3641 (Thanks to Carlos Raúl Perasso.) 4366 Paraguay's 2014 DST will be as predicted. (Thanks to Carlos Raúl Perasso.) 4851 (Thanks to Carlos Raúl Perasso.)
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| H A D | northamerica | 2701 # From Carlos Raúl Perasso (2015-02-02):
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 980 def: Pat<(select (i1 (setult F32:$Ra, F32:$Rb)), F32:$Rs, F32:$Rt), 981 (C2_mux (F2_sfcmpgt F32:$Rb, F32:$Ra), F32:$Rs, F32:$Rt)>; 982 def: Pat<(select (i1 (setult F64:$Ra, F64:$Rb)), F64:$Rs, F64:$Rt), 983 (C2_vmux (F2_dfcmpgt F64:$Rb, F64:$Ra), F64:$Rs, F64:$Rt)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2750 unsigned Ra = fieldFromInstruction(Insn, 12, 4); in DecodeSMLAInstruction() local 2762 if (!Check(S, DecodeGPRnopcRegisterClass(Inst, Ra, Address, Decoder))) in DecodeSMLAInstruction()
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| /freebsd/contrib/tzcode/ |
| H A D | NEWS | 3641 (Thanks to Carlos Raúl Perasso.) 4366 Paraguay's 2014 DST will be as predicted. (Thanks to Carlos Raúl Perasso.) 4851 (Thanks to Carlos Raúl Perasso.)
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| /freebsd/contrib/sendmail/ |
| H A D | PGPKEYS | 111 V9xOCqCWvcJ8gC+Ra+h5PN+ESy4Qqo771fNThV4C5QMQ6t8I+JPiepI+H4U19zxb
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