Searched refs:RV64 (Results 1 – 12 of 12) sorted by relevance
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/ |
H A D | EmulateInstructionRISCV.cpp | 510 {"C_LDSP", 0xE003, 0x6002, DecodeC_LDSP, RV64 | RV128}, 512 {"C_SDSP", 0xE003, 0xE002, DecodeC_SDSP, RV64 | RV128}, 514 {"C_LD", 0xE003, 0x6000, DecodeC_LD, RV64 | RV128}, 516 {"C_SD", 0xE003, 0xE000, DecodeC_SD, RV64 | RV128}, 525 {"C_ADDIW", 0xE003, 0x2001, DecodeC_ADDIW, RV64 | RV128}, 527 {"C_SLLI", 0xE003, 0x2, DecodeC_SLLI, RV64 | RV128}, 528 {"C_SRLI", 0xEC03, 0x8001, DecodeC_SRLI, RV64 | RV128}, 529 {"C_SRAI", 0xEC03, 0x8401, DecodeC_SRAI, RV64 | RV128}, 537 {"C_SUBW", 0xFC63, 0x9C01, DecodeC_SUBW, RV64 | RV128}, 538 {"C_ADDW", 0xFC63, 0x9C21, DecodeC_ADDW, RV64 | RV128}, [all …]
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H A D | RISCVInstructions.h | 294 constexpr uint8_t RV64 = 2; variable 305 uint8_t inst_type = RV32 | RV64 | RV128;
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVRegisterInfo.td | 68 let SubRegRanges = SubRegRangeByHwMode<[RV32, RV64], 72 let SubRegRanges = SubRegRangeByHwMode<[RV32, RV64], 124 def XLenVT : ValueTypeByHwMode<[RV32, RV64], 126 // Allow f64 in GPR for ZDINX on RV64. 127 def XLenFVT : ValueTypeByHwMode<[RV64], 132 [RV32, RV64], 595 let RegInfos = RegInfoByHwMode<[RV32, RV64],
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H A D | RISCVInstrInfoM.td | 119 // Experimental RV64 i32 legalization patterns.
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H A D | RISCVInstrInfoXTHead.td | 626 // mulaw, mulsw are available only in RV64. 850 // Experimental RV64 i32 legalization patterns. 890 // mulaw, mulsw are available only in RV64.
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H A D | RISCVInstrInfoA.td | 391 // Experimental RV64 i32 legalization patterns.
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H A D | RISCVFeatures.td | 1282 : SubtargetFeature<"64bit", "IsRV64", "true", "Implements RV64">; 1291 def RV64 : HwMode<"+64bit", [IsRV64]>;
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H A D | RISCVInstrInfo.td | 1809 /// RV64 patterns 1913 // On RV64, we can directly read these 64-bit counter CSRs. 1966 // Experimental RV64 i32 legalization patterns.
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H A D | RISCVInstrInfoZb.td | 747 // Experimental RV64 i32 legalization patterns.
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | riscv_sifive_vector.td | 53 ["Xsfvcp", "RV64"], ["Xsfvcp"]) in
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H A D | riscv_vector.td | 132 RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin", "RV64"], 133 !if(!eq(type, "y"), ["Zvfbfmin", "RV64"], 134 ["RV64"])) in { 239 RequiredFeatures = !if(!eq(type, "x"), ["Zvfhmin", "RV64"], 240 !if(!eq(type, "y"), ["Zvfbfmin", "RV64"], 241 ["RV64"])) in {
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H A D | DiagnosticDriverKinds.td | 606 "ignoring '-msmall-data-limit=' with -mcmodel=large for -fpic or RV64">,
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