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Searched refs:ROTR (Results 1 – 25 of 56) sorted by relevance

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/freebsd/sys/cddl/boot/zfs/
H A Dsha256.c49 #define ROTR(x, n) (((x) >> (n)) | ((x) << ((sizeof (x) * NBBY)-(n)))) macro
52 #define BIGSIGMA0_256(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
53 #define BIGSIGMA1_256(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
54 #define SIGMA0_256(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ ((x) >> 3))
55 #define SIGMA1_256(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ ((x) >> 10))
58 #define BIGSIGMA0_512(x) (ROTR((x), 28) ^ ROTR((x), 34) ^ ROTR((x), 39))
59 #define BIGSIGMA1_512(x) (ROTR((x), 14) ^ ROTR((x), 18) ^ ROTR((x), 41))
60 #define SIGMA0_512(x) (ROTR((x), 1) ^ ROTR((x), 8) ^ ((x) >> 7))
61 #define SIGMA1_512(x) (ROTR((x), 19) ^ ROTR((x), 61) ^ ((x) >> 6))
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_hash/sha256/cp/
H A Dhash_sha256_cp.c77 #define ROTR(x, n) ROTR32(x, n) macro
78 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
79 #define S1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
80 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3))
81 #define s1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10))
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_hash/sha512/cp/
H A Dhash_sha512_cp.c93 #define ROTR(x, n) ROTR64(x, n) macro
94 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
95 #define S1(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
96 #define s0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7))
97 #define s1(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHR(x, 6))
/freebsd/contrib/bearssl/src/hash/
H A Dsha2big.c30 #define ROTR(x, n) (((uint64_t)(x) << (64 - (n))) | ((uint64_t)(x) >> (n))) macro
32 #define BSG5_0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
33 #define BSG5_1(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
34 #define SSG5_0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ (uint64_t)((x) >> 7))
35 #define SSG5_1(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ (uint64_t)((x) >> 6))
H A Dsha2small.c30 #define ROTR(x, n) (((uint32_t)(x) << (32 - (n))) | ((uint32_t)(x) >> (n))) macro
32 #define BSG2_0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
33 #define BSG2_1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
34 #define SSG2_0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ (uint32_t)((x) >> 3))
35 #define SSG2_1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ (uint32_t)((x) >> 10))
/freebsd/sys/crypto/sha2/
H A Dsha256c.c110 #define ROTR(x, n) ((x >> n) | (x << (32 - n))) macro
111 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
112 #define S1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
113 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3))
114 #define s1(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10))
H A Dsha512c.c139 #define ROTR(x, n) ((x >> n) | (x << (64 - n))) macro
140 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
141 #define S1(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
142 #define s0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7))
143 #define s1(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHR(x, 6))
/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha512-mips.pl105 $ROTR="drotr";
120 $ROTR="rotr";
195 $ROTR $tmp0,$e,@Sigma1[0]
197 $ROTR $tmp1,$e,@Sigma1[1]
199 $ROTR $h,$e,@Sigma1[2]
201 $ROTR $tmp1,$a,@Sigma0[0]
205 $ROTR $h,$a,@Sigma0[1]
209 $ROTR $tmp1,$a,@Sigma0[2]
268 $ROTR $tmp0,@X[1],@sigma0[1]
271 $ROTR $tmp0,@X[1],@sigma0[2]
[all …]
/freebsd/crypto/openssl/crypto/sha/
H A Dsha512.c389 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
419 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
424 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
439 # define ROTR(a,n) _rotr64((a),n) macro
472 # ifndef ROTR
473 # define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) macro
475 # define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
476 # define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
477 # define sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
478 # define sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6))
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DSHA256.cpp32 #define ROTR(x, n) (((x) >> n) | ((x) << (32 - (n)))) macro
37 #define SIGMA_0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
38 #define SIGMA_1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
40 #define SIGMA_2(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHR(x, 10))
41 #define SIGMA_3(x) (ROTR(
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h29 case ISD::ROTR: return ARM_AM::ror; in getShiftOpcForNode()
/freebsd/sys/contrib/openzfs/module/icp/asm-arm/sha2/
H A Dsha512-armv7.S175 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
233 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
272 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
289 @ sigma1(x) (ROTR((x),19) ^ ROTR((x),61) ^ ((x)>>6))
315 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
373 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3485 { ISD::ROTR, MVT::v32i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3486 { ISD::ROTR, MVT::v16i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3487 { ISD::ROTR, MVT::v8i16, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
3581 { ISD::ROTR, MVT::v32i16, { 2, 8, 6, 8 } }, in getIntrinsicInstrCost()
3582 { ISD::ROTR, MVT::v16i16, { 2, 8, 6, 7 } }, in getIntrinsicInstrCost()
3583 { ISD::ROTR, MVT::v8i16, { 2, 7, 6, 7 } }, in getIntrinsicInstrCost()
3584 { ISD::ROTR, MVT::v64i8, { 5, 6, 12, 14 } }, in getIntrinsicInstrCost()
3585 { ISD::ROTR, MVT::v32i8, { 5, 14, 6, 9 } }, in getIntrinsicInstrCost()
3586 { ISD::ROTR, MVT::v16i8, { 5, 14, 6, 9 } }, in getIntrinsicInstrCost()
3645 { ISD::ROTR, MVT::v8i64, { 1, 1, 1, 1 } }, in getIntrinsicInstrCost()
[all …]
H A DX86InstrShiftRotate.td530 // Convert a ROTL shamt to a ROTR shamt on 32-bit integer.
535 // Convert a ROTL shamt to a ROTR shamt on 64-bit integer.
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h737 ROTR, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp100 setOperationAction(ISD::ROTR, MVT::i8, Custom); in AVRTargetLowering()
101 setOperationAction(ISD::ROTR, MVT::i16, Expand); in AVRTargetLowering()
340 case ISD::ROTR: { in LowerShifts()
364 case ISD::ROTR: in LowerShifts()
419 } else if (Op.getOpcode() == ISD::ROTR && ShiftAmount == 3) { in LowerShifts()
430 } else if (Op.getOpcode() == ISD::ROTR && ShiftAmount == 7) { in LowerShifts()
435 } else if ((Op.getOpcode() == ISD::ROTR || Op.getOpcode() == ISD::ROTL) && in LowerShifts()
986 case ISD::ROTR: in LowerOperation()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16ISelLowering.cpp144 setOperationAction(ISD::ROTR, MVT::i32, Expand); in Mips16TargetLowering()
145 setOperationAction(ISD::ROTR, MVT::i64, Expand); in Mips16TargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrInteger.td70 defm ROTR : BinaryInt<rotr, "rotr", 0x78, 0x8a>;
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp82 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
84 setOperationAction(ISD::ROTR, MVT::i16, Expand); in MSP430TargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp133 setOperationAction(ISD::ROTR, MVT::i32, Legal); in ARCTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp282 case ISD::ROTR: return "rotr"; in getOperationName()
H A DLegalizeVectorOps.cpp368 case ISD::ROTR: in LegalizeOp()
1002 case ISD::ROTR: in Expand()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp110 setOperationAction(ISD::ROTR, VT, Expand); in BPFTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1601 ISD::SDIVREM, ISD::UDIVREM, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1650 ISD::AND, ISD::OR, ISD::XOR, ISD::ROTL, ISD::ROTR, in HexagonTargetLowering()
1831 setOperationAction(ISD::ROTR, MVT::i32, Legal); in HexagonTargetLowering()
1832 setOperationAction(ISD::ROTR, MVT::i64, Legal); in HexagonTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp533 ISD::ROTL, ISD::ROTR, ISD::SADDO, ISD::SADDO_CARRY, in NVPTXTargetLowering()
577 setOperationAction(ISD::ROTR, MVT::i64, Legal); in NVPTXTargetLowering()
579 setOperationAction(ISD::ROTR, MVT::i32, Legal); in NVPTXTargetLowering()
583 setOperationAction(ISD::ROTR, MVT::i16, Expand); in NVPTXTargetLowering()
584 setOperationAction(ISD::ROTR, MVT::v2i16, Expand); in NVPTXTargetLowering()
586 setOperationAction(ISD::ROTR, MVT::i8, Expand); in NVPTXTargetLowering()

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