10b57cec5SDimitry Andric //===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file defines the ARM subclass for SelectionDAGTargetInfo. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H 140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "MCTargetDesc/ARMAddressingModes.h" 17*0fca6ea1SDimitry Andric #include "llvm/CodeGen/RuntimeLibcallUtil.h" 180b57cec5SDimitry Andric #include "llvm/CodeGen/SelectionDAGTargetInfo.h" 190b57cec5SDimitry Andric 200b57cec5SDimitry Andric namespace llvm { 210b57cec5SDimitry Andric 220b57cec5SDimitry Andric namespace ARM_AM { getShiftOpcForNode(unsigned Opcode)230b57cec5SDimitry Andric static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) { 240b57cec5SDimitry Andric switch (Opcode) { 250b57cec5SDimitry Andric default: return ARM_AM::no_shift; 260b57cec5SDimitry Andric case ISD::SHL: return ARM_AM::lsl; 270b57cec5SDimitry Andric case ISD::SRL: return ARM_AM::lsr; 280b57cec5SDimitry Andric case ISD::SRA: return ARM_AM::asr; 290b57cec5SDimitry Andric case ISD::ROTR: return ARM_AM::ror; 300b57cec5SDimitry Andric //case ISD::ROTL: // Only if imm -> turn into ROTR. 310b57cec5SDimitry Andric // Can't handle RRX here, because it would require folding a flag into 320b57cec5SDimitry Andric // the addressing mode. :( This causes us to miss certain things. 330b57cec5SDimitry Andric //case ARMISD::RRX: return ARM_AM::rrx; 340b57cec5SDimitry Andric } 350b57cec5SDimitry Andric } 360b57cec5SDimitry Andric } // end namespace ARM_AM 370b57cec5SDimitry Andric 380b57cec5SDimitry Andric class ARMSelectionDAGInfo : public SelectionDAGTargetInfo { 390b57cec5SDimitry Andric public: 400b57cec5SDimitry Andric SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, 410b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 425ffd83dbSDimitry Andric SDValue Size, Align Alignment, 435ffd83dbSDimitry Andric bool isVolatile, bool AlwaysInline, 440b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo, 450b57cec5SDimitry Andric MachinePointerInfo SrcPtrInfo) const override; 460b57cec5SDimitry Andric 470b57cec5SDimitry Andric SDValue 480b57cec5SDimitry Andric EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, 490b57cec5SDimitry Andric SDValue Dst, SDValue Src, SDValue Size, 505ffd83dbSDimitry Andric Align Alignment, bool isVolatile, 510b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo, 520b57cec5SDimitry Andric MachinePointerInfo SrcPtrInfo) const override; 530b57cec5SDimitry Andric 540b57cec5SDimitry Andric // Adjust parameters for memset, see RTABI section 4.3.4 550b57cec5SDimitry Andric SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, 560b57cec5SDimitry Andric SDValue Chain, SDValue Op1, SDValue Op2, 575ffd83dbSDimitry Andric SDValue Op3, Align Alignment, bool isVolatile, 5881ad6265SDimitry Andric bool AlwaysInline, 590b57cec5SDimitry Andric MachinePointerInfo DstPtrInfo) const override; 600b57cec5SDimitry Andric 610b57cec5SDimitry Andric SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl, 620b57cec5SDimitry Andric SDValue Chain, SDValue Dst, SDValue Src, 630b57cec5SDimitry Andric SDValue Size, unsigned Align, 640b57cec5SDimitry Andric RTLIB::Libcall LC) const; 650b57cec5SDimitry Andric }; 660b57cec5SDimitry Andric 670b57cec5SDimitry Andric } 680b57cec5SDimitry Andric 690b57cec5SDimitry Andric #endif 70