Searched refs:RISCVTargetLowering (Results 1 – 14 of 14) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.h | 24 class RISCVTargetLowering; variable
29 RISCVCallLowering(const RISCVTargetLowering &TLI);
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| H A D | RISCVLegalizerInfo.cpp | 1108 RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs( in legalizeExtractSubvector()
1122 RISCVVType::decodeVLMUL(RISCVTargetLowering::getLMUL(LitTyMVT)).second || in legalizeExtractSubvector()
1123 RISCVTargetLowering::getLMUL(LitTyMVT) == RISCVVType::LMUL_1); in legalizeExtractSubvector()
1201 RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs( in legalizeInsertSubvector()
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| H A D | RISCVCallLowering.cpp | 323 RISCVCallLowering::RISCVCallLowering(const RISCVTargetLowering &TLI) in RISCVCallLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInterleavedAccess.cpp | 26 bool RISCVTargetLowering::isLegalInterleavedAccessType( in isLegalInterleavedAccessType()
83 bool RISCVTargetLowering::lowerInterleavedLoad( in lowerInterleavedLoad()
163 bool RISCVTargetLowering::lowerInterleavedStore(StoreInst *SI, in lowerInterleavedStore()
235 bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad( in lowerDeinterleaveIntrinsicToLoad()
309 bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( in lowerInterleaveIntrinsicToStore()
421 bool RISCVTargetLowering::lowerInterleavedVPLoad( in lowerInterleavedVPLoad()
530 bool RISCVTargetLowering::lowerInterleavedVPStore( in lowerInterleavedVPStore()
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| H A D | RISCVISelLowering.cpp | 89 RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, in RISCVTargetLowering() function in RISCVTargetLowering
1688 EVT RISCVTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType()
1699 MVT RISCVTargetLowering::getVPExplicitVectorLengthTy() const { in getVPExplicitVectorLengthTy()
1704 bool RISCVTargetLowering::shouldExpandGetVectorLength(EVT TripCountVT, in shouldExpandGetVectorLength()
1730 bool RISCVTargetLowering::shouldExpandCttzElements(EVT VT) const { in shouldExpandCttzElements()
1735 bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, in getTgtMemIntrinsic()
1785 Info.flags |= RISCVTargetLowering::getTargetMMOFlags(I); in getTgtMemIntrinsic()
2017 bool RISCVTargetLowering::isLegalAddressingMode(const DataLayout &DL, in isLegalAddressingMode()
2051 bool RISCVTargetLowering::isLegalICmpImmediate(int64_t Imm) const { in isLegalICmpImmediate()
2055 bool RISCVTargetLowering::isLegalAddImmediate(int64_t Imm) const { in isLegalAddImmediate()
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| H A D | RISCVISelDAGToDAG.cpp | 287 RISCVVType::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLSEG()
316 RISCVVType::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLSEGFF()
346 RISCVVType::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLXSEG()
370 RISCVVType::VLMUL IndexLMUL = RISCVTargetLowering::getLMUL(IndexVT); in selectVLXSEG()
394 RISCVVType::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVSSEG()
419 RISCVVType::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVSXSEG()
443 RISCVVType::VLMUL IndexLMUL = RISCVTargetLowering::getLMUL(IndexVT); in selectVSXSEG()
1881 switch (RISCVTargetLowering::getLMUL(Src1VT)) { in Select()
1901 switch (RISCVTargetLowering::getLMUL(VT)) { in Select()
1977 switch (RISCVTargetLowering::getLMUL(Src1VT)) { in Select()
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| H A D | RISCVSubtarget.h | 116 RISCVTargetLowering TLInfo;
145 const RISCVTargetLowering *getTargetLowering() const override { in getTargetLowering()
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| H A D | RISCVTargetTransformInfo.h | 35 const RISCVTargetLowering *TLI;
38 const RISCVTargetLowering *getTLI() const { return TLI; } in getTLI()
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| H A D | RISCVCallingConv.cpp | 282 const RISCVTargetLowering &TLI) { in allocateRVVReg()
331 const RISCVTargetLowering &TLI = *Subtarget.getTargetLowering(); in CC_RISCV()
627 const RISCVTargetLowering &TLI = *Subtarget.getTargetLowering(); in CC_RISCV_FastCC()
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| H A D | RISCVISelLowering.h | 29 class RISCVTargetLowering : public TargetLowering {
33 explicit RISCVTargetLowering(const TargetMachine &TM,
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| H A D | RISCVGatherScatterLowering.cpp | 37 const RISCVTargetLowering *TLI = nullptr;
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| H A D | RISCVFrameLowering.cpp | 1030 const RISCVTargetLowering *TLI = Subtarget.getTargetLowering(); in emitPrologue()
1808 const RISCVTargetLowering *TLI = in eliminateCallFramePseudoInstr()
2346 const RISCVTargetLowering *TLI = Subtarget.getTargetLowering(); in emitStackProbeInline()
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| H A D | RISCVInstrInfoA.td | 163 // RISCVTargetLowering::{emitLeadingFence,emitTrailingFence}.
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| H A D | RISCVTargetTransformInfo.cpp | 876 MVT M1VT = RISCVTargetLowering::getM1VT(ContainerVT); in getShuffleCost()
920 RISCVVType::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in isM1OrSmaller()
1708 return RISCVTargetLowering::computeVLMAX(VectorBits, EltSize, MinSize); in getEstimatedVLFor()
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