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Searched refs:RISCVInstrInfo (Results 1 – 25 of 25) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVLateBranchOpt.cpp40 const RISCVInstrInfo *RII = nullptr;
57 RISCVCC::CondCode CC = RISCVInstrInfo::getCondFromBranchOpc(Cond[0].getImm()); in runOnBasicBlock()
65 if (!RISCVInstrInfo::isFromLoadImm(MRI, Cond[1], C0) || in runOnBasicBlock()
66 !RISCVInstrInfo::isFromLoadImm(MRI, Cond[2], C1)) in runOnBasicBlock()
70 RISCVInstrInfo::evaluateCondBranch(CC, C0, C1) ? TBB : FBB; in runOnBasicBlock()
H A DRISCVInstrInfo.cpp83 RISCVInstrInfo::RISCVInstrInfo(RISCVSubtarget &STI) in RISCVInstrInfo() function in RISCVInstrInfo
90 MCInst RISCVInstrInfo::getNop() const { in getNop()
99 Register RISCVInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
136 Register RISCVInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
184 Register RISCVInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
190 Register RISCVInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
235 bool RISCVInstrInfo::isReallyTriviallyReMaterializable( in isReallyTriviallyReMaterializable()
276 if (RISCVInstrInfo::isVectorConfigInstr(*MBBI)) { in isConvertibleToVMV_V_V()
296 if (!RISCVInstrInfo::isVLPreservingConfig(*MBBI)) in isConvertibleToVMV_V_V()
381 void RISCVInstrInfo::copyPhysRegVector( in copyPhysRegVector()
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H A DRISCVInsertVSETVLI.cpp387 if (RISCVInstrInfo::isScalarInsertInstr(MI)) { in getDemanded()
398 if (RISCVInstrInfo::isFloatScalarMoveOrScalarSplatInstr(MI) && in getDemanded()
408 if (RISCVInstrInfo::isScalarExtractInstr(MI)) { in getDemanded()
427 if (RISCVInstrInfo::isVSlideInstr(MI) && VLOp.isImm() && in getDemanded()
442 if (RISCVInstrInfo::isScalarSplatInstr(MI) && VLOp.isImm() && in getDemanded()
448 if (RISCVInstrInfo::isFloatScalarMoveOrScalarSplatInstr(MI) && in getDemanded()
472 if (RISCVInstrInfo::isVExtractInstr(MI)) { in getDemanded()
591 return RISCVInstrInfo::isNonZeroLoadImmediate(*DefMI); in hasNonZeroAVL()
929 if (!DefMI || !RISCVInstrInfo::isVectorConfigInstr(*DefMI)) in INITIALIZE_PASS()
1033 assert(RISCVInstrInfo::isScalarExtractInstr(MI) || in computeInfoForInstr()
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H A DRISCV.td36 include "RISCVInstrInfo.td"
86 def RISCVInstrInfo : InstrInfo {
100 let InstructionSet = RISCVInstrInfo;
H A DRISCVOptWInstrs.cpp68 bool removeSExtWInstrs(MachineFunction &MF, const RISCVInstrInfo &TII,
70 bool stripWSuffixes(MachineFunction &MF, const RISCVInstrInfo &TII,
72 bool appendWSuffixes(MachineFunction &MF, const RISCVInstrInfo &TII,
673 const RISCVInstrInfo &TII, in removeSExtWInstrs()
683 if (!RISCVInstrInfo::isSEXT_W(MI)) in removeSExtWInstrs()
725 const RISCVInstrInfo &TII, in stripWSuffixes()
752 const RISCVInstrInfo &TII, in appendWSuffixes()
809 const RISCVInstrInfo &TII = *ST.getInstrInfo(); in runOnMachineFunction()
H A DRISCVIndirectBranchTracking.cpp57 static void emitLpad(MachineBasicBlock &MBB, const RISCVInstrInfo *TII, in emitLpad()
66 const RISCVInstrInfo *TII = Subtarget.getInstrInfo(); in runOnMachineFunction()
H A DRISCVPostRAExpandPseudoInsts.cpp29 const RISCVInstrInfo *TII;
51 TII = static_cast<const RISCVInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
H A DRISCVSubtarget.h114 RISCVInstrInfo InstrInfo;
141 const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
H A DRISCVExpandAtomicPseudoInsts.cpp34 const RISCVInstrInfo *TII;
257 static void doAtomicBinOpExpansion(const RISCVInstrInfo *TII, MachineInstr &MI, in doAtomicBinOpExpansion()
298 static void insertMaskedMerge(const RISCVInstrInfo *TII, DebugLoc DL, in insertMaskedMerge()
320 static void doMaskedAtomicBinOpExpansion(const RISCVInstrInfo *TII, in doMaskedAtomicBinOpExpansion()
425 static void insertSext(const RISCVInstrInfo *TII, DebugLoc DL, in insertSext()
H A DRISCVLandingPadSetup.cpp49 const RISCVInstrInfo &TII = *STI.getInstrInfo(); in runOnMachineFunction()
H A DRISCVFrameLowering.cpp120 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSCSPrologue()
179 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSCSEpilogue()
216 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSiFiveCLICStackSwap()
260 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSiFiveCLICPreemptibleSaves()
312 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitSiFiveCLICPreemptibleRestores()
615 const RISCVInstrInfo *TII = STI.getInstrInfo(); in allocateAndProbeStackForRVV()
745 const RISCVInstrInfo *TII = STI.getInstrInfo(); in allocateStack()
1118 const RISCVInstrInfo *TII = STI.getInstrInfo(); in emitPrologue()
1680 const RISCVInstrInfo &TII) { in estimateFunctionSizeInBytes()
1721 const RISCVInstrInfo *TII = MF.getSubtarget<RISCVSubtarget>().getInstrInfo(); in processFunctionBeforeFrameFinalized()
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H A DRISCVInsertWriteVXRM.cpp236 if (VXRMIdx >= 0 && !RISCVInstrInfo::ignoresVXRM(MI)) { in INITIALIZE_PASS()
394 if (VXRMIdx >= 0 && !RISCVInstrInfo::ignoresVXRM(MI)) { in emitWriteVXRM()
H A DRISCVInstrInfo.h62 class RISCVInstrInfo : public RISCVGenInstrInfo {
65 explicit RISCVInstrInfo(RISCVSubtarget &STI);
H A DRISCVPushPopOptimizer.cpp28 const RISCVInstrInfo *TII;
H A DRISCVMoveMerger.cpp29 const RISCVInstrInfo *TII;
H A DRISCVLoadStoreOptimizer.cpp81 const RISCVInstrInfo *TII;
H A DRISCVMakeCompressible.cpp415 const RISCVInstrInfo &TII = *STI.getInstrInfo(); in runOnMachineFunction()
H A DRISCVExpandPseudoInsts.cpp34 const RISCVInstrInfo *TII;
458 const RISCVInstrInfo *TII;
H A DRISCVRegisterInfo.cpp207 const RISCVInstrInfo *TII = ST.getInstrInfo(); in adjustReg()
H A DRISCVAsmPrinter.cpp1097 bool hasVLOutput = RISCVInstrInfo::isFaultOnlyFirstLoad(*MI); in lowerRISCVVMachineInstrToMCInst()
H A DRISCVInstrInfo.td1 //===-- RISCVInstrInfo.td - Target Description for RISC-V --*- tablegen -*-===//
H A DRISCVISelLowering.cpp21472 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in EmitLoweredCascadedSelect()
21593 if (RISCVInstrInfo::isSelectPseudo(*SequenceMBBI)) { in emitSelectPseudo()
21616 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in emitSelectPseudo()
21670 if (RISCVInstrInfo::isSelectPseudo(*SelectMBBI)) { in emitSelectPseudo()
21846 const RISCVInstrInfo &TII = *Subtarget.getInstrInfo(); in emitFROUND()
24444 const RISCVInstrInfo *TII = Subtarget.getInstrInfo(); in emitDynamicProbedAlloc()
H A DRISCVInstrInfoVPseudos.td545 // RISCVInstrInfo.h.
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp156 const RISCVInstrInfo &TII;
/freebsd/lib/clang/libllvm/
H A DMakefile1641 SRCS_MIN+= Target/RISCV/RISCVInstrInfo.cpp