| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 203 Register RHSReg, bool SetFlags = false,
208 Register RHSReg, AArch64_AM::ShiftExtendType ShiftType,
212 Register RHSReg, AArch64_AM::ShiftExtendType ExtType,
237 Register emitSubs_rr(MVT RetVT, Register LHSReg, Register RHSReg,
239 Register emitSubs_rs(MVT RetVT, Register LHSReg, Register RHSReg,
247 Register RHSReg, uint64_t ShiftImm);
1230 Register RHSReg = getRegForValue(RHS); in emitAddSub() local
1231 if (!RHSReg) in emitAddSub()
1233 return emitAddSub_rx(UseAdd, RetVT, LHSReg, RHSReg, ExtendType, 0, in emitAddSub()
1249 Register RHSReg = getRegForValue(MulLHS); in emitAddSub() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 54 ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg,
504 unsigned LHSReg, unsigned RHSReg, in validOpRegPair() argument
507 return MRI.getType(LHSReg) == MRI.getType(RHSReg) && in validOpRegPair()
509 validReg(MRI, RHSReg, ExpectedSize, ExpectedRegBankID); in validOpRegPair()
546 auto RHSReg = MIB.getReg(3); in selectCmp() local
547 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
557 if (!insertComparison(Helper, I, ResReg, ARMConds.first, LHSReg, RHSReg, in selectCmp()
564 RHSReg, ZeroReg)) in selectCmp()
566 if (!insertComparison(Helper, I, ResReg, ARMConds.second, LHSReg, RHSReg, in selectCmp()
578 unsigned LHSReg, unsigned RHSReg, in insertComparison() argument
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2138 Register RHSReg = getRegForValue(RHS); in X86FastEmitCMoveSelect() local
2140 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2146 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2195 Register RHSReg = getRegForValue(RHS); in X86FastEmitSSESelect() local
2198 if (!LHSReg || !RHSReg || !CmpLHSReg || !CmpRHSReg) in X86FastEmitSSESelect()
2224 Register MovReg = fastEmitInst_rrrr(MovOpcode, VR128X, RHSReg, CmpReg, in X86FastEmitSSESelect()
2246 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2268 Register AndNReg = fastEmitInst_rr(Opc[2], VR128, CmpReg, RHSReg); in X86FastEmitSSESelect()
2340 Register RHSReg = getRegForValue(RHS); in X86FastEmitPseudoSelect() local
2341 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3154 Register RHSReg = MI.getOperand(2).getReg(); in matchHoistLogicOpWithSameOpcodeHands() local
3157 if (!MRI.hasOneNonDBGUse(LHSReg) || !MRI.hasOneNonDBGUse(RHSReg)) in matchHoistLogicOpWithSameOpcodeHands()
3162 MachineInstr *RightHandInst = getDefIgnoringCopies(RHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
4905 Register RHSReg = MI.getOffsetReg(); in matchReassocConstantInnerLHS() local
4907 auto NewCst = B.buildConstant(MRI.getType(RHSReg), LHSCstOff->Value); in matchReassocConstantInnerLHS()
4912 LHSPtrAdd->getOperand(2).setReg(RHSReg); in matchReassocConstantInnerLHS()
5026 Register RHSReg = MI.getOperand(2).getReg(); in matchReassocCommBinOp() local
5028 if (tryReassocBinOp(Opc, DstReg, LHSReg, RHSReg, MatchInfo)) in matchReassocCommBinOp()
5030 if (tryReassocBinOp(Opc, DstReg, RHSReg, LHSReg, MatchInfo)) in matchReassocCommBinOp()
6327 Register RHSReg = MI.getOperand(2).getReg(); in matchCombineFSubFNegFMulToFMadOrFMA() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 314 unsigned RHSReg; in emitLogicalOp() local
316 RHSReg = materializeInt(C, MVT::i32); in emitLogicalOp()
318 RHSReg = getRegForValue(RHS); in emitLogicalOp()
319 if (!RHSReg) in emitLogicalOp()
326 emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg); in emitLogicalOp()
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