| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 208 unsigned RHSReg, bool SetFlags = false,
214 unsigned RHSReg, AArch64_AM::ShiftExtendType ShiftType,
218 unsigned RHSReg, AArch64_AM::ShiftExtendType ExtType,
243 unsigned emitSubs_rr(MVT RetVT, unsigned LHSReg, unsigned RHSReg,
245 unsigned emitSubs_rs(MVT RetVT, unsigned LHSReg, unsigned RHSReg,
253 unsigned RHSReg, uint64_t ShiftImm);
1235 Register RHSReg = getRegForValue(RHS); in emitAddSub() local
1236 if (!RHSReg) in emitAddSub()
1238 return emitAddSub_rx(UseAdd, RetVT, LHSReg, RHSReg, ExtendType, 0, in emitAddSub()
1254 Register RHSReg = getRegForValue(MulLHS); in emitAddSub() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 54 ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg,
504 unsigned LHSReg, unsigned RHSReg, in validOpRegPair() argument
507 return MRI.getType(LHSReg) == MRI.getType(RHSReg) && in validOpRegPair()
509 validReg(MRI, RHSReg, ExpectedSize, ExpectedRegBankID); in validOpRegPair()
546 auto RHSReg = MIB.getReg(3); in selectCmp() local
547 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
557 if (!insertComparison(Helper, I, ResReg, ARMConds.first, LHSReg, RHSReg, in selectCmp()
564 RHSReg, ZeroReg)) in selectCmp()
566 if (!insertComparison(Helper, I, ResReg, ARMConds.second, LHSReg, RHSReg, in selectCmp()
578 unsigned LHSReg, unsigned RHSReg, in insertComparison() argument
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2132 Register RHSReg = getRegForValue(RHS); in X86FastEmitCMoveSelect() local
2134 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2140 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2189 Register RHSReg = getRegForValue(RHS); in X86FastEmitSSESelect() local
2192 if (!LHSReg || !RHSReg || !CmpLHSReg || !CmpRHSReg) in X86FastEmitSSESelect()
2218 unsigned MovReg = fastEmitInst_rrrr(MovOpcode, VR128X, RHSReg, CmpReg, in X86FastEmitSSESelect()
2240 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2262 Register AndNReg = fastEmitInst_rr(Opc[2], VR128, CmpReg, RHSReg); in X86FastEmitSSESelect()
2334 Register RHSReg = getRegForValue(RHS); in X86FastEmitPseudoSelect() local
2335 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3119 Register RHSReg = MI.getOperand(2).getReg(); in matchHoistLogicOpWithSameOpcodeHands() local
3122 if (!MRI.hasOneNonDBGUse(LHSReg) || !MRI.hasOneNonDBGUse(RHSReg)) in matchHoistLogicOpWithSameOpcodeHands()
3127 MachineInstr *RightHandInst = getDefIgnoringCopies(RHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
4777 Register RHSReg = MI.getOffsetReg(); in matchReassocConstantInnerLHS() local
4779 auto NewCst = B.buildConstant(MRI.getType(RHSReg), LHSCstOff->Value); in matchReassocConstantInnerLHS()
4784 LHSPtrAdd->getOperand(2).setReg(RHSReg); in matchReassocConstantInnerLHS()
4899 Register RHSReg = MI.getOperand(2).getReg(); in matchReassocCommBinOp() local
4901 if (tryReassocBinOp(Opc, DstReg, LHSReg, RHSReg, MatchInfo)) in matchReassocCommBinOp()
4903 if (tryReassocBinOp(Opc, DstReg, RHSReg, LHSReg, MatchInfo)) in matchReassocCommBinOp()
6083 Register RHSReg = MI.getOperand(2).getReg(); in matchCombineFSubFNegFMulToFMadOrFMA() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 316 unsigned RHSReg; in emitLogicalOp() local
318 RHSReg = materializeInt(C, MVT::i32); in emitLogicalOp()
320 RHSReg = getRegForValue(RHS); in emitLogicalOp()
321 if (!RHSReg) in emitLogicalOp()
328 emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg); in emitLogicalOp()
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