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Searched refs:REG_WR (Results 1 – 13 of 13) sorted by relevance

/freebsd/sys/dev/bxe/
H A Decore_init_ops.h54 REG_WR(sc, addr + i*4, data[i]); in ecore_init_str_wr()
284 REG_WR(sc, addr, op->write.val); in ecore_init_block()
526 REG_WR(sc, read_arb_addr[i].l, read_arb_data[i][r_order].l); in ecore_init_pxp_arb()
527 REG_WR(sc, read_arb_addr[i].add, in ecore_init_pxp_arb()
529 REG_WR(sc, read_arb_addr[i].ubound, in ecore_init_pxp_arb()
537 REG_WR(sc, write_arb_addr[i].l, in ecore_init_pxp_arb()
540 REG_WR(sc, write_arb_addr[i].add, in ecore_init_pxp_arb()
543 REG_WR(sc, write_arb_addr[i].ubound, in ecore_init_pxp_arb()
548 REG_WR(sc, write_arb_addr[i].l, in ecore_init_pxp_arb()
552 REG_WR(sc, write_arb_addr[i].add, in ecore_init_pxp_arb()
[all …]
H A Dbxe_elink.c956 REG_WR(sc, reg, val); in elink_bits_en()
965 REG_WR(sc, reg, val); in elink_bits_dis()
993 REG_WR(sc, params->lfa_base + in elink_check_lfa()
1112 REG_WR(sc, MCP_REG_MCPR_GP_OENABLE, gp_oenable & ~epio_mask); in elink_get_epio()
1134 REG_WR(sc, MCP_REG_MCPR_GP_OUTPUTS, gp_output); in elink_set_epio()
1138 REG_WR(sc, MCP_REG_MCPR_GP_OENABLE, gp_oenable | epio_mask); in elink_set_epio()
1185 REG_WR(sc, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688); in elink_ets_e2e3a0_disabled()
1194 REG_WR(sc, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7); in elink_ets_e2e3a0_disabled()
1196 REG_WR(sc, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0); in elink_ets_e2e3a0_disabled()
1200 REG_WR(sc, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); in elink_ets_e2e3a0_disabled()
[all …]
H A Dbxe.c1036 REG_WR(sc, (hw_lock_control_reg + 4), resource_bit); in bxe_acquire_hw_lock()
1080 REG_WR(sc, hw_lock_control_reg, resource_bit); in bxe_release_hw_lock()
1125 REG_WR(sc, MCP_REG_MCPR_NVM_SW_ARB, in bxe_acquire_nvram_lock()
1161 REG_WR(sc, MCP_REG_MCPR_NVM_SW_ARB, in bxe_release_nvram_lock()
1194 REG_WR(sc, MCP_REG_MCPR_NVM_ACCESS_ENABLE, in bxe_enable_nvram_access()
1206 REG_WR(sc, MCP_REG_MCPR_NVM_ACCESS_ENABLE, in bxe_disable_nvram_access()
1224 REG_WR(sc, MCP_REG_MCPR_NVM_COMMAND, MCPR_NVM_COMMAND_DONE); in bxe_nvram_read_dword()
1227 REG_WR(sc, MCP_REG_MCPR_NVM_ADDR, in bxe_nvram_read_dword()
1231 REG_WR(sc, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); in bxe_nvram_read_dword()
1337 REG_WR(sc, MCP_REG_MCPR_NVM_COMMAND, MCPR_NVM_COMMAND_DONE); in bxe_nvram_write_dword()
[all …]
H A Decore_init.h274 REG_WR(sc, ECORE_Q_VOQ_REG_ADDR(pf_q_num), new_cos); in ecore_map_q_cos()
279 REG_WR(sc, reg_addr, reg_bit_map & (~q_bit_map)); in ecore_map_q_cos()
284 REG_WR(sc, reg_addr, reg_bit_map | q_bit_map); in ecore_map_q_cos()
295 REG_WR(sc, reg_addr, reg_bit_map); in ecore_map_q_cos()
757 REG_WR(sc, mcp_attn_ctl_regs[i].addr, reg_val); in ecore_set_mcp_parity()
781 REG_WR(sc, ecore_blocks_parity_data[i].mask_addr, in ecore_disable_blocks_parity()
806 REG_WR(sc, XSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in ecore_clear_blocks_parity()
807 REG_WR(sc, TSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in ecore_clear_blocks_parity()
808 REG_WR(sc, USEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in ecore_clear_blocks_parity()
809 REG_WR(sc, CSEM_REG_FAST_MEMORY + SEM_FAST_REG_PARITY_RST, 0x1); in ecore_clear_blocks_parity()
[all …]
H A Decore_sp.c920 REG_WR(sc, (ECORE_PORT_ID(sc) ? NIG_REG_LLH1_FUNC_MEM_ENABLE : in ecore_set_mac_in_nig()
3595 REG_WR(sc, ECORE_MC_HASH_OFFSET(sc, i), mc_filter[i]); in ecore_mcast_setup_e1h()
/freebsd/sys/dev/bce/
H A Dif_bce.c1743 REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_READ_REQ)); in bce_ctx_rd()
1759 REG_WR(sc, BCE_CTX_DATA_ADR, offset); in bce_ctx_rd()
1793 REG_WR(sc, BCE_CTX_CTX_DATA, ctx_val); in bce_ctx_wr()
1794 REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_WRITE_REQ)); in bce_ctx_wr()
1809 REG_WR(sc, BCE_CTX_DATA_ADR, offset); in bce_ctx_wr()
1810 REG_WR(sc, BCE_CTX_DATA, ctx_val); in bce_ctx_wr()
1845 REG_WR(sc, BCE_EMAC_MDIO_MODE, val); in bce_miibus_read_reg()
1854 REG_WR(sc, BCE_EMAC_MDIO_COMM, val); in bce_miibus_read_reg()
1882 REG_WR(sc, BCE_EMAC_MDIO_MODE, val); in bce_miibus_read_reg()
1925 REG_WR(sc, BCE_EMAC_MDIO_MODE, val1); in bce_miibus_write_reg()
[all …]
H A Dif_bcereg.h1053 #define REG_WR(sc, offset, val) bce_reg_wr(sc, offset, val) macro
1057 #define REG_WR(sc, offset, val) \ macro
1071 REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))
1073 REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_hw.c211 REG_WR(p_hwfn, in ecore_ptt_set_win()
284 REG_WR(p_hwfn, bar_addr, val); in ecore_wr()
406 REG_WR(p_hwfn, in ecore_fid_pretend()
422 REG_WR(p_hwfn, in ecore_port_pretend()
439 REG_WR(p_hwfn, in ecore_port_unpretend()
H A Decore_vf.c150 REG_WR(p_hwfn, in ecore_send_msg2pf()
154 REG_WR(p_hwfn, in ecore_send_msg2pf()
163 REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger, *((u32 *)&trigger)); in ecore_send_msg2pf()
H A Decore_init_ops.c624 REG_WR(p_hwfn, gtt_base + i * PXP_GLOBAL_ENTRY_SIZE,
H A Dbcm_osal.h184 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val) macro
H A Decore_sriov.c1455 REG_WR(p_hwfn, in ecore_iov_send_response()
2398 REG_WR(p_hwfn, in ecore_iov_vf_mbx_start_rxq()
3966 REG_WR(p_hwfn, in ecore_iov_execute_vf_flr_cleanup()
H A Decore_dev.c2724 REG_WR(p_hwfn, addr, 0); in ecore_final_cleanup()
2743 REG_WR(p_hwfn, addr, 0); in ecore_final_cleanup()