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Searched refs:R600InstrInfo (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp33 R600InstrInfo::R600InstrInfo(const R600Subtarget &ST) in R600InstrInfo() function in R600InstrInfo
36 bool R600InstrInfo::isVector(const MachineInstr &MI) const { in isVector()
40 void R600InstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
75 bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, in isLegalToSplitMBBAt()
86 bool R600InstrInfo::isMov(unsigned Opcode) const { in isMov()
97 bool R600InstrInfo::isReductionOp(unsigned Opcode) const { in isReductionOp()
101 bool R600InstrInfo::isCubeOp(unsigned Opcode) const { in isCubeOp()
112 bool R600InstrInfo::isALUInstr(unsigned Opcode) const { in isALUInstr()
118 bool R600InstrInfo::hasInstrModifiers(unsigned Opcode) const { in hasInstrModifiers()
126 bool R600InstrInfo::isLDSInstr(unsigned Opcode) const { in isLDSInstr()
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H A DR600InstrInfo.h38 class R600InstrInfo final : public R600GenInstrInfo {
68 explicit R600InstrInfo(const R600Subtarget &);
123 const std::vector<R600InstrInfo::BankSwizzle> &Swz,
125 R600InstrInfo::BankSwizzle TransSwz) const;
129 std::vector<R600InstrInfo::BankSwizzle> &SwzCandidate,
131 R600InstrInfo::BankSwizzle TransSwz) const;
H A DR600.td11 def R600InstrInfo : InstrInfo {
16 let InstructionSet = R600InstrInfo;
36 include "R600InstrInfo.td"
H A DR600MachineScheduler.h24 class R600InstrInfo; variable
29 const R600InstrInfo *TII = nullptr;
H A DR600Subtarget.h32 R600InstrInfo InstrInfo;
50 const R600InstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
H A DR600Packetizer.cpp52 const R600InstrInfo *TII;
222 std::vector<R600InstrInfo::BankSwizzle> &BS, in isBundlableWithCurrentPMI()
290 std::vector<R600InstrInfo::BankSwizzle> BS; in addToPacket()
321 const R600InstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
H A DR600InstrInfo.td1 //===-- R600InstrInfo.td - R600 DAG nodes ------------------*- tablegen -*-===//
H A DR600RegisterInfo.cpp40 const R600InstrInfo *TII = ST.getInstrInfo(); in getReservedRegs()
H A DR600ClauseMergePass.cpp39 const R600InstrInfo *TII;
H A DR600ExpandSpecialInstrs.cpp31 const R600InstrInfo *TII = nullptr;
H A DR600EmitClauseMarkers.cpp34 const R600InstrInfo *TII = nullptr;
H A DR600Instructions.td99 // R600Defines.h, R600InstrInfo::buildDefaultInstruction(),
100 // and R600InstrInfo::getOperandIdx().
141 // R600InstrInfo::buildDefaultInstruction(), and R600InstrInfo::getOperandIdx().
181 // R600InstrInfo::buildDefaultInstruction(), and
182 // R600InstrInfo::getOperandIdx().
H A DR600OptimizeVectorRegisters.cpp79 const R600InstrInfo *TII = nullptr;
H A DR600MachineScheduler.cpp26 TII = static_cast<const R600InstrInfo*>(DAG->TII); in initialize()
H A DR600ControlFlowFinalizer.cpp203 const R600InstrInfo *TII = nullptr;
H A DR600ISelLowering.cpp217 const R600InstrInfo *TII = Subtarget->getInstrInfo(); in EmitInstrWithCustomInserter()
1947 const R600InstrInfo *TII = Subtarget->getInstrInfo(); in FoldOperand()
2073 const R600InstrInfo *TII = Subtarget->getInstrInfo(); in PostISelFolding()
H A DR600MachineCFGStructurizer.cpp157 const R600InstrInfo *TII = nullptr;