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/freebsd/crypto/openssl/crypto/aes/asm/
H A Daes-riscv64-zkn.pl113 my ($Q0,$Q1,$Q2,$Q3) = use_regs(6..9);
142 ld $Q0,0($INP)
153 xor $Q0,$Q0,$T0
161 @{[aes64esm $Q2,$Q0,$Q1]}
162 @{[aes64esm $Q3,$Q1,$Q0]}
170 xor $Q0,$Q2,$T0
177 @{[aes64es $Q2,$Q0,$Q1]}
178 @{[aes64es $Q3,$Q1,$Q0]}
183 xor $Q0,$Q2,$T0
186 sd $Q0,0($OUTP)
[all …]
H A Daes-riscv32-zkn.pl186 my ($Q0,$Q1,$Q2,$Q3) = use_regs(6..9);
253 lw $Q0,0($INP)
268 xor $Q0,$Q0,$T0
284 @{[aes32esmi4 $T0,$Q0,$Q1,$Q2,$Q3]}
285 @{[aes32esmi4 $T1,$Q1,$Q2,$Q3,$Q0]}
286 @{[aes32esmi4 $T2,$Q2,$Q3,$Q0,$Q1]}
287 @{[aes32esmi4 $T3,$Q3,$Q0,$Q1,$Q2]}
292 lw $Q0,0($KEYP)
297 @{[aes32esmi4 $Q0,$T0,$T1,$T2,$T3]}
314 @{[aes32esmi4 $T0,$Q0,$Q1,$Q2,$Q3]}
[all …]
H A Daes-riscv64.pl77 my ($Q0,$Q1,$Q2,$Q3) = use_regs(6..9);
232 ld $Q0,0($INP)
250 xor $Q0,$Q0,$T0
252 srli $Q1,$Q0,32
266 [$Q0,$Q1,$Q2,$Q3], # State registers
278 [$Q1,$Q2,$Q3,$Q0],
290 [$Q2,$Q3,$Q0,$Q1],
302 [$Q3,$Q0,$Q1,$Q2],
337 xor $Q0,$T0,$T4
366 [$Q0,$Q1,$Q2,$Q3],
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVectorPrint.cpp69 (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3); in isVecReg()
80 if (R >= Hexagon::Q0 && R <= Hexagon::Q3) { in getStringReg()
82 return S[R-Hexagon::Q0]; in getStringReg()
184 } else if (Reg >= Hexagon::Q0 && Reg <= Hexagon::Q3) { in runOnMachineFunction()
185 LLVM_DEBUG(dbgs() << "adding dump for Q" << Reg - Hexagon::Q0 << '\n'); in runOnMachineFunction()
/freebsd/sys/arm/include/
H A Dcpu.h292 _R64F0(cp15_cntpct_get, CP15_CNTPCT(%Q0, %R0)) in _WF0()
293 _R64F0(cp15_cntvct_get, CP15_CNTVCT(%Q0, %R0)) in _WF0()
294 _R64F0(cp15_cntp_cval_get, CP15_CNTP_CVAL(%Q0, %R0)) in _WF0()
295 _W64F1(cp15_cntp_cval_set, CP15_CNTP_CVAL(%Q0, %R0)) in _WF0()
296 _R64F0(cp15_cntv_cval_get, CP15_CNTV_CVAL(%Q0, %R0)) in _WF0()
297 _W64F1(cp15_cntv_cval_set, CP15_CNTV_CVAL(%Q0, %R0)) in _WF0()
298 _R64F0(cp15_cntvoff_get, CP15_CNTVOFF(%Q0, %R0)) in _WF0()
299 _W64F1(cp15_cntvoff_set, CP15_CNTVOFF(%Q0, %R0)) in _WF0()
300 _R64F0(cp15_cnthp_cval_get, CP15_CNTHP_CVAL(%Q0, %R0)) in _WF0()
301 _W64F1(cp15_cnthp_cval_set, CP15_CNTHP_CVAL(%Q0, %R0)) in _WF0()
/freebsd/sys/contrib/libsodium/src/libsodium/include/sodium/private/
H A Dsse2_64_32.h18 # define _mm_set_epi64x(Q0, Q1) sodium__mm_set_epi64x((Q0), (Q1)) argument
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.td77 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
84 CCIfType<[f32], CCAssignToStackWithShadow<4, 4, [Q0, Q1, Q2, Q3]>>,
85 CCIfType<[f64], CCAssignToStackWithShadow<8, 4, [Q0, Q1, Q2, Q3]>>,
86 CCIfType<[v2f64], CCAssignToStackWithShadow<16, 4, [Q0, Q1, Q2, Q3]>>,
97 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
142 CCIfType<[f32], CCAssignToStackWithShadow<4, 4, [Q0, Q1, Q2, Q3]>>,
144 CCIfType<[f64], CCAssignToStackWithShadow<8, 8, [Q0, Q1, Q2, Q3]>>,
146 CCAssignToStackWithShadow<16, 16, [Q0, Q1, Q2, Q3]>>>,
147 CCIfType<[v2f64], CCAssignToStackWithShadow<16, 8, [Q0, Q1, Q2, Q3]>>
226 CCIfType<[v2f64], CCAssignToReg<[Q0, Q1, Q2, Q3]>>,
[all …]
H A DARMLatencyMutations.cpp819 (OP.getReg() - ARM::S0) / 4 + ARM::Q0 == RegID)) in modifyMixedWidthFP()
828 (OP.getReg() - ARM::S0) / 4 + ARM::Q0 == RegID)) in modifyMixedWidthFP()
837 (OP.getReg() - ARM::D0) / 2 + ARM::Q0 == RegID)) in modifyMixedWidthFP()
H A DARMLowOverheadLoops.cpp1743 ARM::D0 + (Dst - ARM::Q0) * 2) in Expand()
1744 .addReg(ARM::D0 + (Src - ARM::Q0) * 2) in Expand()
1749 ARM::D0 + (Dst - ARM::Q0) * 2 + 1) in Expand()
1750 .addReg(ARM::D0 + (Src - ARM::Q0) * 2 + 1) in Expand()
/freebsd/crypto/openssl/test/recipes/20-test_dhparam_check_data/valid/
H A Ddhx_p2048_q224_t1862.pem
/freebsd/lib/msun/bsdsrc/
H A Db_tgamma.c169 Q0 = 1.4501953125000000e+0, variable
185 q = Q0 + z * (Q1 + z * (Q2 + z * (Q3 + z * (Q4 + z * (Q5 + in ratfun_gam()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECallingConv.td51 CCAssignToRegWithShadow<[Q0, Q1, Q2, Q3],
96 CCAssignToRegWithShadow<[Q0, Q1, Q2, Q3],
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-asus-kommando-ipmi-card.dts89 /*Q0 128*/ "", "", "", "", "", "", "", "",
H A Daspeed-bmc-qcom-dc-scm-v1.dts111 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-nvidia-msx4-bmc.dts99 /*Q0-Q7*/ "","","MEMORY_HOT_0","MEMORY_HOT_1","","","","",
H A Daspeed-bmc-vegman-n110.dts31 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-vegman-sx20.dts31 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-amd-daytonax.dts142 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-inventec-transformers.dts287 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-facebook-greatlakes.dts271 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-amd-ethanolx.dts144 /*Q0-Q7*/ "","","","","","","","",
H A Daspeed-bmc-opp-nicole.dts235 /*Q0-Q7*/ "","","","","","","","id-button",
H A Daspeed-bmc-opp-romulus.dts251 /*Q0-Q7*/ "","","","","","","","id-button",
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td114 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
154 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
277 [Q0, Q1, Q2, Q3]>>,
284 [Q0, Q1, Q2, Q3]>>,
309 CCIfType<[f128], CCAssignToReg<[Q0, Q1]>>,
331 CCAssignToReg<[Q0, Q1, Q2, Q3]>>
413 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>,
605 // preserves X0-X8 and Q0-Q7.
H A DAArch64CallingConvention.cpp34 static const MCPhysReg QRegList[] = {AArch64::Q0, AArch64::Q1, AArch64::Q2,

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