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Searched refs:PostRA (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUIGroupLP.h20 enum class SchedulingPhase { Initial, PreRAReentry, PostRA }; enumerator
H A DAMDGPUIGroupLP.cpp1555 if (Phase != AMDGPU::SchedulingPhase::PostRA) in shouldApplyStrategy()
1557 if (Phase != AMDGPU::SchedulingPhase::PostRA && !analyzeDAG(TII)) in shouldApplyStrategy()
1614 bool IsPostRA = Phase == AMDGPU::SchedulingPhase::PostRA; in applyIGLPStrategy()
H A DAMDGPUTargetMachine.cpp941 createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA)); in createPostMachineScheduler()
H A DGCNSchedStrategy.cpp1667 addMutation(createIGroupLPDAGMutation(AMDGPU::SchedulingPhase::PostRA)); in schedule()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp3529 bool PostRA = !MRI->isSSA(); in foldFrameOffset() local
3533 if (!PostRA) in foldFrameOffset()
3740 bool PostRA = !MRI->isSSA(); in convertToImmediateForm() local
3774 bool HasImmForm = instrHasImmForm(MI.getOpcode(), IsVFReg, III, PostRA); in convertToImmediateForm()
3935 ImmInstrInfo &III, bool PostRA) const { in instrHasImmForm()
4290 if (PostRA) { in instrHasImmForm()
4304 if (PostRA) { in instrHasImmForm()
4322 if (PostRA) { in instrHasImmForm()
4336 if (PostRA) { in instrHasImmForm()
4565 bool PostRA = !MRI->isSSA(); in simplifyToLI() local
[all …]
H A DPPCInstrInfo.h648 bool PostRA) const;
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineSink.cpp1402 bool PostRA = MRI.getNumVirtRegs() == 0; in attemptDebugCopyProp() local
1411 if (arePhysRegs != PostRA) in attemptDebugCopyProp()
1416 if (!PostRA) in attemptDebugCopyProp()
1425 if (PostRA && Reg != DstMO->getReg()) in attemptDebugCopyProp()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX.td25 let PostRAScheduler = 1; // Use PostRA scheduler.
H A DAArch64SchedA55.td29 let PostRAScheduler = 1; // Enable PostRA scheduler pass.
H A DAArch64SchedOryon.td23 let PostRAScheduler = 1; // Using PostRA sched.
H A DAArch64SchedA510.td24 let PostRAScheduler = 1; // Enable PostRA scheduler pass.
H A DAArch64SchedThunderX2T99.td25 let PostRAScheduler = 1; // Using PostRA sched.
H A DAArch64SchedThunderX3T110.td24 let PostRAScheduler = 1; // Using PostRA sched.
H A DAArch64SchedA64FX.td20 let PostRAScheduler = 1; // Using PostRA sched.
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleA9.td15 // required until SD and PostRA schedulers are replaced by MachineScheduler.
2177 // Define VLDM/VSTM PostRA Resources.
2195 // VLDM PostRA Variants. These variants expand A9WriteLMfpPostRA into a
H A DARMScheduleSwift.td15 // required until SD and PostRA schedulers are replaced by MachineScheduler.
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.td1827 // during ISelLowering, which produces the PostRA version of this instruction.