Home
last modified time | relevance | path

Searched refs:Port (Results 1 – 25 of 269) sorted by relevance

1234567891011

/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp-mv78460.dtsi82 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
83 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
84 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
85 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
86 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
87 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
88 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */
89 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
90 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
91 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
[all …]
H A Darmada-xp-mv78260.dtsi65 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
66 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
67 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
69 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
70 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
71 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
72 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
73 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
74 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
[all …]
H A Darmada-xp-mv78230.dtsi64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
65 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
66 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
67 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
68 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
70 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
72 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 0.1 IO */
73 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM */
[all …]
H A Darmada-385.dtsi52 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
53 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
54 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
55 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
56 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
57 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
58 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
59 0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
H A Darmada-380.dtsi53 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
54 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
55 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
56 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
57 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
58 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */>;
H A Darmada-xp-db.dts192 /* Port 0, Lane 0 */
196 /* Port 0, Lane 1 */
200 /* Port 0, Lane 2 */
204 /* Port 0, Lane 3 */
208 /* Port 2, Lane 0 */
212 /* Port 3, Lane 0 */
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dmvebu-pci.txt103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
105 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
106 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
107 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
108 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
109 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */
110 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
111 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
112 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Domap-usb-host.txt44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
46 * "utmi_p1_gfclk" - Port 1 UTMI clock mux.
47 * "utmi_p2_gfclk" - Port 2 UTMI clock mux.
48 * "usb_host_hs_utmi_p1_clk" - Port 1 UTMI clock gate.
49 * "usb_host_hs_utmi_p2_clk" - Port 2 UTMI clock gate.
50 * "usb_host_hs_utmi_p3_clk" - Port 3 UTMI clock gate.
51 * "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
52 * "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
53 * "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTensorSpec.h67 int Port = 0) {
68 return TensorSpec(Name, Port, getDataType<T>(), sizeof(T), Shape);
72 int port() const { return Port; } in port()
77 return Name == Other.Name && Port == Other.Port && Type == Other.Type &&
95 : TensorSpec(NewName, Other.Port, Other.Type, Other.ElementSize, in TensorSpec()
101 TensorSpec(const std::string &Name, int Port, TensorType Type,
107 int Port = 0; variable
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8650-hdk.dts1139 * WSA8845 Port 1 (DAC) <=> SWR0 Port 1 (SPKR_L)
1140 * WSA8845 Port 2 (COMP) <=> SWR0 Port 2 (SPKR_L_COMP)
1141 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 3 (SPKR_L_BOOST)
1142 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
1143 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 10 (SPKR_L_VI)
1144 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
1162 * WSA8845 Port 1 (DAC) <=> SWR0 Port 4 (SPKR_R)
1163 * WSA8845 Port 2 (COMP) <=> SWR0 Port 5 (SPKR_R_COMP)
1164 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 6 (SPKR_R_BOOST)
1165 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
[all …]
H A Dsm8650-qrd.dts1091 * WSA8845 Port 1 (DAC) <=> SWR0 Port 1 (SPKR_L)
1092 * WSA8845 Port 2 (COMP) <=> SWR0 Port 2 (SPKR_L_COMP)
1093 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 3 (SPKR_L_BOOST)
1094 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
1095 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 10 (SPKR_L_VI)
1096 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
1114 * WSA8845 Port 1 (DAC) <=> SWR0 Port 4 (SPKR_R)
1115 * WSA8845 Port 2 (COMP) <=> SWR0 Port 5 (SPKR_R_COMP)
1116 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 6 (SPKR_R_BOOST)
1117 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
[all …]
H A Dsm8650-mtp.dts756 * WSA8845 Port 1 (DAC) <=> SWR0 Port 1 (SPKR_L)
757 * WSA8845 Port 2 (COMP) <=> SWR0 Port 2 (SPKR_L_COMP)
758 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 3 (SPKR_L_BOOST)
759 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
760 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 10 (SPKR_L_VI)
761 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
779 * WSA8845 Port 1 (DAC) <=> SWR0 Port 4 (SPKR_R)
780 * WSA8845 Port 2 (COMP) <=> SWR0 Port 5 (SPKR_R_COMP)
781 * WSA8845 Port 3 (BOOST) <=> SWR0 Port 6 (SPKR_R_BOOST)
782 * WSA8845 Port 4 (PBR) <=> SWR0 Port 7 (PBR)
[all …]
/freebsd/contrib/ofed/infiniband-diags/src/
H A Dibtracert.c74 typedef struct Port Port; typedef
78 struct Port { struct
79 Port *next; argument
80 Port *remoteport; argument
103 Port *ports; argument
126 static int is_port_inactive(Node * node, Port * port, Switch * sw) in is_port_inactive()
136 static int get_node(Node * node, Port * port, ib_portid_t * portid) in get_node()
201 static int sameport(Port * a, Port * b) in sameport()
215 static void dump_endnode(int dump, char *prompt, Node * node, Port * port) in dump_endnode()
241 static void dump_route(int dump, Node * node, int outport, Port * port) in dump_route()
[all …]
/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/
H A Docteon_3xxx.dts208 reg = <0x3>; /* Port */
215 reg = <0x4>; /* Port */
220 reg = <0x5>; /* Port */
225 reg = <0x6>; /* Port */
230 reg = <0x7>; /* Port */
235 reg = <0x8>; /* Port */
240 reg = <0x9>; /* Port */
245 reg = <0xa>; /* Port */
250 reg = <0xb>; /* Port */
255 reg = <0xc>; /* Port */
[all …]
H A Docteon_68xx.dts269 reg = <0x0>; /* Port */
275 reg = <0x1>; /* Port */
281 reg = <0x2>; /* Port */
287 reg = <0x3>; /* Port */
301 reg = <0x0>; /* Port */
307 reg = <0x1>; /* Port */
313 reg = <0x2>; /* Port */
319 reg = <0x3>; /* Port */
333 reg = <0x0>; /* Port */
339 reg = <0x1>; /* Port */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dmdp5.txt35 Port 0 -> MDP_INTF0 (eDP)
36 Port 1 -> MDP_INTF1 (DSI1)
37 Port 2 -> MDP_INTF2 (DSI2)
38 Port 3 -> MDP_INTF3 (HDMI)
41 Port 0 -> MDP_INTF1 (DSI1)
44 Port 0 -> MDP_INTF1 (DSI1)
45 Port 1 -> MDP_INTF2 (DSI2)
46 Port 2 -> MDP_INTF3 (HDMI)
H A Dmdp4.txt33 Port 0 -> LCDC/LVDS
34 Port 1 -> DSI1 Cmd/Video
35 Port 2 -> DSI2 Cmd/Video
36 Port 3 -> DTV
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dmt7530.txt34 - reg: Port address described must be 6 for CPU port and from 0 to 5 for
43 Port 5 of mt7530 and mt7621 switch is muxed between:
51 Port 5 modes/configurations:
52 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd
56 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
59 3. Port 5 is muxed to GMAC5 and can interface to an external phy.
60 Port 5 becomes an extra switch port.
63 4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port.
151 Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4.
217 /* Commented out. Port 4 is handled by 2nd GMAC.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dti-phy-gmii-sel.txt1 CPSW Port's Interface Mode Selection PHY Tree Bindings
16 | |Port 1..<--+-->GMII/MII<------->
31 CPSW Port's Interface Mode Selection PHY describes MII interface mode between
32 CPSW Port and Ethernet PHY which depends on Eth PHY and board configuration.
34 CPSW Port's Interface Mode Selection PHY device should defined as child device
/freebsd/share/misc/
H A Dpci_vendors59 7a39 PCIe x1 Root Port
60 7a49 PCIe x4 Root Port
61 7a59 PCIe x8 Root Port
62 7a69 PCIe x16 Root Port
490 1000 3140 SAS3081E-R 8-Port SAS/SATA Host Bus Adapter
642 4c52 96c8 LRSA96C8 8-Port SATA3(6Gb/s)Exchange Adapter (with Raid)
1151 1000 100b PEX88000 PCIe Gen 4 Virtual Upstream/Downstream Port
1163 1000 100b PEX88000 PCIe Gen 4 Virtual Upstream/Downstream Port
1181 1000 0024 PEX89024 PCIe Gen 5 24 port/lane Switch Upstream/Downstream Port
1182 1000 0032 PEX89032 PCIe Gen 5 32 port/lane Switch Upstream/Downstream Port
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dcavium-pip.txt62 reg = <0x0>; /* Port */
68 reg = <0x1>; /* Port */
74 reg = <0x2>; /* Port */
80 reg = <0x3>; /* Port */
94 reg = <0x0>; /* Port */
/freebsd/sys/contrib/device-tree/src/arc/
H A Dabilis_tb100.dtsi30 /* Port 1 */
43 /* Port 2 */
56 /* Port 3 */
69 /* Port 4 */
82 /* Port 5 */
95 /* Port 6 */
111 /* Port 7 */
124 /* Port 8 */
128 /* Port 9 */
H A Dabilis_tb101.dtsi30 /* Port 1 */
43 /* Port 2 */
56 /* Port 3 */
69 /* Port 4 */
82 /* Port 5 */
101 /* Port 6 */
117 /* Port 7 */
130 /* Port 8 */
137 /* Port 9 */
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-minipack.dts128 * to PIM (Port Interface Module) #1 (1-based).
141 * to PIM (Port Interface Module) #2 (1-based).
154 * to PIM (Port Interface Module) #3 (1-based).
167 * to PIM (Port Interface Module) #4 (1-based).
180 * to PIM (Port Interface Module) #5 (1-based).
193 * to PIM (Port Interface Module) #6 (1-based).
206 * to PIM (Port Interface Module) #7 (1-based).
219 * to PIM (Port Interface Module) #8 (1-based).
805 * (Port Interface Module) #1 (1-based).
871 * (Port Interfac
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Debuginfod/
H A DHTTPServer.cpp130 Port = ListenPort; in bind()
139 return Port = ListenPort; in bind()
143 if (!Port) in listen()
155 Port = 0; in stop()

1234567891011