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Searched refs:Plan (Results 1 – 25 of 28) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanTransforms.h40 static bool runPass(bool (*Transform)(VPlan &, ArgsTy...), VPlan &Plan, in runPass()
42 bool Res = Transform(Plan, Args...); in runPass()
44 verifyVPlanIsValid(Plan); in runPass()
50 static void runPass(void (*Fn)(VPlan &, ArgsTy...), VPlan &Plan, in runPass()
52 Fn(Plan, Args...); in runPass()
54 verifyVPlanIsValid(Plan); in runPass()
69 VPlan &Plan, Type *InductionTy, PredicatedScalarEvolution &PSE,
75 LLVM_ABI_FOR_TEST static void createLoopRegions(VPlan &Plan);
80 static void attachCheckBlock(VPlan &Plan, Value *Cond, BasicBlock *CheckBlock,
87 VPlanPtr &Plan,
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H A DVPlanConstruction.cpp40 std::unique_ptr<VPlan> Plan; member in __anoncb3ea4040111::PlainCFGBuilder
68 : TheLoop(Lp), LI(LI), Plan(std::make_unique<VPlan>(Lp)) {} in PlainCFGBuilder()
120 VPBasicBlock *VPBB = Plan->createVPBasicBlock(Name); in getOrCreateVPBB()
165 VPValue *NewVPVal = Plan->getOrAddLiveIn(IRVal); in getOrCreateVPOperand()
247 VPIRBasicBlock *Entry = cast<VPIRBasicBlock>(Plan->getEntry()); in buildPlainCFG()
249 for (VPIRBasicBlock *ExitVPBB : Plan->getExitBlocks()) in buildPlainCFG()
267 IRDef2VPValue[&I] = Plan->getOrAddLiveIn(&I); in buildPlainCFG()
309 for (auto *EB : Plan->getExitBlocks()) in buildPlainCFG()
317 Plan->getEntry()->setOneSuccessor(getOrCreateVPBB(TheLoop->getHeader())); in buildPlainCFG()
318 Plan->getEntry()->setPlan(&*Plan); in buildPlainCFG()
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H A DVPlanTransforms.cpp42 VPlanPtr &Plan, in tryToConvertVPInstructionsToVPRecipes() argument
48 Plan->getVectorLoopRegion()); in tryToConvertVPInstructionsToVPRecipes()
72 VPValue *Start = Plan->getOrAddLiveIn(II->getStartValue()); in tryToConvertVPInstructionsToVPRecipes()
74 vputils::getOrCreateVPValueForSCEVExpr(*Plan, II->getStep(), SE); in tryToConvertVPInstructionsToVPRecipes()
76 Phi, Start, Step, &Plan->getVF(), *II, Ingredient.getDebugLoc()); in tryToConvertVPInstructionsToVPRecipes()
124 static bool sinkScalarOperands(VPlan &Plan) { in sinkScalarOperands() argument
125 auto Iter = vp_depth_first_deep(Plan.getEntry()); in sinkScalarOperands()
145 bool ScalarVFOnly = Plan.hasScalarVFOnly(); in sinkScalarOperands()
245 static bool mergeReplicateRegionsIntoSuccessors(VPlan &Plan) { in mergeReplicateRegionsIntoSuccessors() argument
253 vp_depth_first_deep(Plan.getEntry()))) { in mergeReplicateRegionsIntoSuccessors()
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H A DVPlanUtils.cpp27 VPValue *vputils::getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr, in getOrCreateVPValueForSCEVExpr() argument
29 if (auto *Expanded = Plan.getSCEVExpansion(Expr)) in getOrCreateVPValueForSCEVExpr()
33 Expanded = Plan.getOrAddLiveIn(E->getValue()); in getOrCreateVPValueForSCEVExpr()
41 Expanded = Plan.getOrAddLiveIn(U->getValue()); in getOrCreateVPValueForSCEVExpr()
44 Plan.getEntry()->appendRecipe(Expanded->getDefiningRecipe()); in getOrCreateVPValueForSCEVExpr()
47 Plan.addSCEVExpansion(Expr, Expanded); in getOrCreateVPValueForSCEVExpr()
51 bool vputils::isHeaderMask(const VPValue *V, VPlan &Plan) { in isHeaderMask() argument
65 return B == Plan.getTripCount() && in isHeaderMask()
66 (match(A, m_ScalarIVSteps(m_Specific(Plan.getCanonicalIV()), in isHeaderMask()
68 m_Specific(&Plan.getVF()))) || in isHeaderMask()
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H A DVPlanUnroll.cpp39 VPlan &Plan; member in __anone9af25350111::UnrollState
72 Type *CanIVIntTy = Plan.getCanonicalIV()->getScalarType(); in getConstantVPV()
73 return Plan.getOrAddLiveIn(ConstantInt::get(CanIVIntTy, Part)); in getConstantVPV()
77 UnrollState(VPlan &Plan, unsigned UF, LLVMContext &Ctx) in UnrollState() argument
78 : Plan(Plan), UF(UF), TypeInfo(Plan.getCanonicalIV()->getScalarType()) {} in UnrollState()
163 VPInstruction::WideIVStep, {&Plan.getVF(), ScalarStep}, IVTy, Flags, in unrollWidenInductionByUF()
371 if (Plan.hasScalarVFOnly()) { in unrollBlock()
401 void VPlanTransforms::unrollByUF(VPlan &Plan, unsigned UF, LLVMContext &Ctx) { in unrollByUF() argument
403 Plan.setUF(UF); in unrollByUF()
404 auto Cleanup = make_scope_exit([&Plan]() { in unrollByUF()
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H A DVPlan.cpp155 VPlan *VPBlockBase::getPlan() { return getPlanEntry(this)->Plan; } in getPlan()
157 const VPlan *VPBlockBase::getPlan() const { return getPlanEntry(this)->Plan; } in getPlan()
176 Plan = ParentPlan; in setPlan()
246 IRBuilderBase &Builder, VPlan *Plan, in VPTransformState() argument
248 : TTI(TTI), VF(VF), CFG(DT), LI(LI), AC(AC), Builder(Builder), Plan(Plan), in VPTransformState()
250 VPDT(*Plan) {} in VPTransformState()
303 Plan->getVectorPreheader()); in get()
311 CFG.VPBB2IRBB[Plan->getVectorPreheader()]; in get()
395 unsigned UF = Plan->getUF(); in setDebugLocFrom()
451 if (State.Plan->isExitBlock(SuccOrExitVPB)) { in connectToPredecessors()
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H A DLoopVectorize.cpp489 GeneratedRTChecks &RTChecks, VPlan &Plan) in InnerLoopVectorizer() argument
494 RTChecks(RTChecks), Plan(Plan), in InnerLoopVectorizer()
495 VectorPHVPB(Plan.getVectorLoopRegion()->getSinglePredecessor()) {} in InnerLoopVectorizer()
628 VPlan &Plan; member in llvm::InnerLoopVectorizer
674 ProfileSummaryInfo *PSI, GeneratedRTChecks &Checks, VPlan &Plan) in InnerLoopAndEpilogueVectorizer() argument
677 BFI, PSI, Checks, Plan), in InnerLoopAndEpilogueVectorizer()
711 ProfileSummaryInfo *PSI, GeneratedRTChecks &Check, VPlan &Plan) in EpilogueVectorizerMainLoop() argument
713 EPI, CM, BFI, PSI, Check, Plan) {} in EpilogueVectorizerMainLoop()
738 ProfileSummaryInfo *PSI, GeneratedRTChecks &Checks, VPlan &Plan) in EpilogueVectorizerEpilogueLoop() argument
740 EPI, CM, BFI, PSI, Checks, Plan) { in EpilogueVectorizerEpilogueLoop()
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H A DVPlanHelpers.h208 IRBuilderBase &Builder, VPlan *Plan, Loop *CurrentParentLoop,
331 VPlan *Plan; member
397 void assignNames(const VPlan &Plan);
402 VPSlotTracker(const VPlan *Plan = nullptr) {
403 if (Plan)
404 assignNames(*Plan);
418 const VPlan &Plan; variable
458 : OS(O), Plan(P), SlotTracker(&P) {} in VPlanPrinter()
H A DVPlanVerifier.cpp68 bool verify(const VPlan &Plan);
430 bool VPlanVerifier::verify(const VPlan &Plan) { in verify() argument
431 if (any_of(vp_depth_first_shallow(Plan.getEntry()), in verify()
435 const VPRegionBlock *TopRegion = Plan.getVectorLoopRegion(); in verify()
483 bool llvm::verifyVPlanIsValid(const VPlan &Plan, bool VerifyLate) { in verifyVPlanIsValid() argument
485 VPDT.recalculate(const_cast<VPlan &>(Plan)); in verifyVPlanIsValid()
486 VPTypeAnalysis TypeInfo(Plan); in verifyVPlanIsValid()
488 return Verifier.verify(Plan); in verifyVPlanIsValid()
H A DVPRecipeBuilder.h49 VPlan &Plan; variable
147 VPRecipeBuilder(VPlan &Plan, Loop *OrigLoop, const TargetLibraryInfo *TLI, in VPRecipeBuilder() argument
154 : Plan(Plan), OrigLoop(OrigLoop), TLI(TLI), TTI(TTI), Legal(Legal), in VPRecipeBuilder()
212 return Plan.getOrAddLiveIn(V); in getVPValueOrAddLiveIn()
H A DVPlanAnalysis.cpp24 VPTypeAnalysis::VPTypeAnalysis(const VPlan &Plan) in VPTypeAnalysis() argument
25 : Ctx(Plan.getScalarHeader()->getIRBasicBlock()->getContext()) { in VPTypeAnalysis()
26 if (auto LoopRegion = Plan.getVectorLoopRegion()) { in VPTypeAnalysis()
36 auto *TC = Plan.getTripCount(); in VPTypeAnalysis()
316 VPlan &Plan, DenseSet<VPRecipeBase *> &EphRecipes) { in collectEphemeralRecipesForVPlan() argument
320 vp_depth_first_deep(Plan.getVectorLoopRegion()->getEntry()))) { in collectEphemeralRecipesForVPlan()
415 VPlan &Plan, ArrayRef<ElementCount> VFs, const TargetTransformInfo &TTI, in calculateRegisterUsageForPlan() argument
432 LoopInvariants.insert(&Plan.getVectorTripCount()); in calculateRegisterUsageForPlan()
440 Plan.getVectorLoopRegion()); in calculateRegisterUsageForPlan()
470 if (VPBB == Plan.getVectorLoopRegion()->getExiting()) { in calculateRegisterUsageForPlan()
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H A DVPlanAnalysis.h64 VPTypeAnalysis(const VPlan &Plan);
74 void collectEphemeralRecipesForVPlan(VPlan &Plan,
97 VPlan &Plan, ArrayRef<ElementCount> VFs, const TargetTransformInfo &TTI,
H A DVPlanPredicator.cpp168 auto &Plan = *HeaderVPBB->getPlan(); in createHeaderMask() local
169 auto *IV = new VPWidenCanonicalIVRecipe(Plan.getCanonicalIV()); in createHeaderMask()
173 VPValue *BTC = Plan.getOrCreateBackedgeTakenCount(); in createHeaderMask()
264 VPlanTransforms::introduceMasksAndLinearize(VPlan &Plan, bool FoldTail) { in introduceMasksAndLinearize() argument
265 VPRegionBlock *LoopRegion = Plan.getVectorLoopRegion(); in introduceMasksAndLinearize()
H A DVPlanDominatorTree.h43 explicit VPDominatorTree(VPlan &Plan) { recalculate(Plan); }
H A DLoopVectorizationPlanner.h455 InstructionCost cost(VPlan &Plan, ElementCount VF) const;
460 InstructionCost precomputeCosts(VPlan &Plan, ElementCount VF,
514 [&](const VPlanPtr &Plan) { return Plan->hasVF(VF); }); in hasPlanWithVF()
567 void adjustRecipesForReductions(VPlanPtr &Plan,
572 void attachRuntimeChecks(VPlan &Plan, GeneratedRTChecks &RTChecks,
H A DVPlanUtils.h33 VPValue *getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr,
89 bool isHeaderMask(const VPValue *V, VPlan &Plan);
99 VPBasicBlock *getFirstLoopHeader(VPlan &Plan, VPDominatorTree &VPDT);
H A DVPlanVerifier.h40 LLVM_ABI_FOR_TEST bool verifyVPlanIsValid(const VPlan &Plan,
H A DVPlanSLP.h50 LLVM_ABI_FOR_TEST VPInterleavedAccessInfo(VPlan &Plan,
H A DVPlanSLP.cpp92 VPInterleavedAccessInfo::VPInterleavedAccessInfo(VPlan &Plan, in VPInterleavedAccessInfo() argument
95 visitRegion(Plan.getVectorLoopRegion(), Old2New, IAI); in VPInterleavedAccessInfo()
H A DVPlan.h101 VPlan *Plan = nullptr; variable
4230 inline raw_ostream &operator<<(raw_ostream &OS, const VPlan &Plan) {
4231 Plan.print(OS);
/freebsd/contrib/file/magic/Magdir/
H A Dplan94 # plan9: file(1) magic for AT&T Bell Labs' Plan 9 executables and object files
7 0 belong 0x00000107 Plan 9 executable, Motorola 68k
8 0 belong 0x00000197 Plan 9 executable, AT&T Hobbit
9 0 belong 0x000001EB Plan 9 executable, Intel i386
10 0 belong 0x00000247 Plan 9 executable, Intel i960
11 0 belong 0x000002AB Plan 9 executable, SPARC
12 0 belong 0x00000407 Plan 9 executable, MIPS R3000
13 0 belong 0x0000048B Plan 9 executable, AT&T DSP 3210
14 0 belong 0x00000517 Plan 9 executable, MIPS R4000 BE
15 0 belong 0x000005AB Plan 9 executable, AMD 29000
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H A Dcommands79 # AT&T Bell Labs' Plan 9 shell
80 0 string/fwt #!\ /bin/rc Plan 9 rc shell script text executable
H A Dwordprocessors264 # Corel Plan Perfect
267 >>>9 byte x Corel Plan Perfect: Unknown filetype %d
/freebsd/contrib/llvm-project/lldb/docs/
H A Dpython_extensions.rst33 Scripted Thread Plan Plugins
/freebsd/crypto/openssl/doc/designs/quic-design/
H A Dconnection-state-machine.md618 Implementation Plan

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