10b57cec5SDimitry Andric //===-- VPlanHCFGBuilder.h --------------------------------------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric /// 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// This file defines the VPlanHCFGBuilder class which contains the public 110b57cec5SDimitry Andric /// interface (buildHierarchicalCFG) to build a VPlan-based Hierarchical CFG 120b57cec5SDimitry Andric /// (H-CFG) for an incoming IR. 130b57cec5SDimitry Andric /// 140b57cec5SDimitry Andric /// A H-CFG in VPlan is a control-flow graph whose nodes are VPBasicBlocks 150b57cec5SDimitry Andric /// and/or VPRegionBlocks (i.e., other H-CFGs). The outermost H-CFG of a VPlan 160b57cec5SDimitry Andric /// consists of a VPRegionBlock, denoted Top Region, which encloses any other 170b57cec5SDimitry Andric /// VPBlockBase in the H-CFG. This guarantees that any VPBlockBase in the H-CFG 180b57cec5SDimitry Andric /// other than the Top Region will have a parent VPRegionBlock and allows us 190b57cec5SDimitry Andric /// to easily add more nodes before/after the main vector loop (such as the 200b57cec5SDimitry Andric /// reduction epilogue). 210b57cec5SDimitry Andric /// 220b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric #ifndef LLVM_TRANSFORMS_VECTORIZE_VPLAN_VPLANHCFGBUILDER_H 250b57cec5SDimitry Andric #define LLVM_TRANSFORMS_VECTORIZE_VPLAN_VPLANHCFGBUILDER_H 260b57cec5SDimitry Andric 270b57cec5SDimitry Andric #include "VPlanDominatorTree.h" 280b57cec5SDimitry Andric 290b57cec5SDimitry Andric namespace llvm { 300b57cec5SDimitry Andric 310b57cec5SDimitry Andric class Loop; 3281ad6265SDimitry Andric class LoopInfo; 3381ad6265SDimitry Andric class VPRegionBlock; 3481ad6265SDimitry Andric class VPlan; 350b57cec5SDimitry Andric class VPlanTestBase; 360b57cec5SDimitry Andric 370b57cec5SDimitry Andric /// Main class to build the VPlan H-CFG for an incoming IR. 380b57cec5SDimitry Andric class VPlanHCFGBuilder { 390b57cec5SDimitry Andric friend VPlanTestBase; 400b57cec5SDimitry Andric 410b57cec5SDimitry Andric private: 420b57cec5SDimitry Andric // The outermost loop of the input loop nest considered for vectorization. 430b57cec5SDimitry Andric Loop *TheLoop; 440b57cec5SDimitry Andric 450b57cec5SDimitry Andric // Loop Info analysis. 460b57cec5SDimitry Andric LoopInfo *LI; 470b57cec5SDimitry Andric 480b57cec5SDimitry Andric // The VPlan that will contain the H-CFG we are building. 490b57cec5SDimitry Andric VPlan &Plan; 500b57cec5SDimitry Andric 510b57cec5SDimitry Andric // Dominator analysis for VPlan plain CFG to be used in the 520b57cec5SDimitry Andric // construction of the H-CFG. This analysis is no longer valid once regions 530b57cec5SDimitry Andric // are introduced. 540b57cec5SDimitry Andric VPDominatorTree VPDomTree; 550b57cec5SDimitry Andric 56*06c3fb27SDimitry Andric /// Build plain CFG for TheLoop and connects it to Plan's entry. 57*06c3fb27SDimitry Andric void buildPlainCFG(); 580b57cec5SDimitry Andric 590b57cec5SDimitry Andric public: VPlanHCFGBuilder(Loop * Lp,LoopInfo * LI,VPlan & P)600b57cec5SDimitry Andric VPlanHCFGBuilder(Loop *Lp, LoopInfo *LI, VPlan &P) 610b57cec5SDimitry Andric : TheLoop(Lp), LI(LI), Plan(P) {} 620b57cec5SDimitry Andric 630b57cec5SDimitry Andric /// Build H-CFG for TheLoop and update Plan accordingly. 640b57cec5SDimitry Andric void buildHierarchicalCFG(); 650b57cec5SDimitry Andric }; 660b57cec5SDimitry Andric } // namespace llvm 670b57cec5SDimitry Andric 680b57cec5SDimitry Andric #endif // LLVM_TRANSFORMS_VECTORIZE_VPLAN_VPLANHCFGBUILDER_H 69