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Searched refs:PartTy (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp559 Register SrcReg, LLT SrcTy, LLT PartTy, in buildCopyToRegs() argument
562 assert(SrcTy != PartTy && "identical part types shouldn't reach here"); in buildCopyToRegs()
564 const TypeSize PartSize = PartTy.getSizeInBits(); in buildCopyToRegs()
566 if (PartTy.isVector() == SrcTy.isVector() && in buildCopyToRegs()
567 PartTy.getScalarSizeInBits() > SrcTy.getScalarSizeInBits()) { in buildCopyToRegs()
573 if (SrcTy.isVector() && !PartTy.isVector() && in buildCopyToRegs()
582 if (SrcTy.isVector() && PartTy.isVector() && in buildCopyToRegs()
583 PartTy.getSizeInBits() == SrcTy.getSizeInBits() && in buildCopyToRegs()
585 PartTy.getElementCount())) { in buildCopyToRegs()
592 LLT GCDTy = getGCDType(SrcTy, PartTy); in buildCopyToRegs()
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H A DLegalizerHelper.cpp163 LLT ResultTy, LLT PartTy, in insertParts() argument
175 if (PartTy.isVector()) in insertParts()
192 LLT GCDTy = getGCDType(getGCDType(ResultTy, LeftoverTy), PartTy); in insertParts()
4585 LLT PartTy = MRI.getType(VecParts[PartIdx]); in fewerElementsVectorExtractInsertVectorElt() local
4589 PartTy, VecParts[PartIdx], InsertVal, NewIdx); in fewerElementsVectorExtractInsertVectorElt()
4662 auto splitTypePieces = [=](LLT PartTy, SmallVectorImpl<Register> &ValRegs, in reduceLoadStoreWidth()
4665 unsigned PartSize = PartTy.getSizeInBits(); in reduceLoadStoreWidth()
4674 MF.getMachineMemOperand(&MMO, ByteOffset, PartTy); in reduceLoadStoreWidth()
4677 Register Dst = MRI.createGenericVirtualRegister(PartTy); in reduceLoadStoreWidth()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerHelper.h200 LLT PartTy, ArrayRef<Register> PartRegs,
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DSROA.cpp4525 auto *PartTy = Type::getIntNTy(LI->getContext(), PartSize * 8); in presplitLoadsAndStores() local
4529 PartTy, in presplitLoadsAndStores()
4666 auto *PartTy = Type::getIntNTy(Ty->getContext(), PartSize * 8); in presplitLoadsAndStores() local
4678 PartTy, in presplitLoadsAndStores()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp897 LLT PartTy = LLT::scalar(PartSize); in executeInWaterfallLoop() local
906 auto UnmergeOp = B.buildUnmerge(PartTy, OpReg); in executeInWaterfallLoop()
907 auto UnmergeCurrentLane = B.buildUnmerge(PartTy, CurrentLaneReg); in executeInWaterfallLoop()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3197 // The PartTy is the equivalent of "getLoadableTypeOfSize(HaveAlign)". in LowerUnalignedLoad()
3198 MVT PartTy = HaveAlign <= 8 ? MVT::getIntegerVT(8 * HaveAlign) in LowerUnalignedLoad() local
3201 allowsMemoryAccessForAlignment(Ctx, DL, PartTy, *LN->getMemOperand()); in LowerUnalignedLoad()