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Searched refs:PacketMI (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp652 const MachineInstr &PacketMI, unsigned DepReg) { in canPromoteToNewValueStore() argument
662 const MCInstrDesc& MCID = PacketMI.getDesc(); in canPromoteToNewValueStore()
685 if (HII->isPostIncrement(PacketMI) && PacketMI.mayLoad() && in canPromoteToNewValueStore()
686 getPostIncrementOperand(PacketMI, HII).getReg() == DepReg) { in canPromoteToNewValueStore()
695 if (isLoadAbsSet(PacketMI) && getAbsSetOperand(PacketMI).getReg() == DepReg) in canPromoteToNewValueStore()
700 if (HII->isPredicated(PacketMI)) { in canPromoteToNewValueStore()
711 for (auto &MO : PacketMI.operands()) { in canPromoteToNewValueStore()
743 HII->isDotNewInst(PacketMI) != HII->isDotNewInst(MI) || in canPromoteToNewValueStore()
744 getPredicateSense(MI, HII) != getPredicateSense(PacketMI, HII)) in canPromoteToNewValueStore()
765 if (&TempMI != &PacketMI && !StartCheck) // Start processing only after in canPromoteToNewValueStore()
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H A DHexagonVLIWPacketizer.h138 const MachineInstr &PacketMI, unsigned DepReg);