652       const MachineInstr &PacketMI, unsigned DepReg) {  in canPromoteToNewValueStore()  argument
662   const MCInstrDesc& MCID = PacketMI.getDesc();  in canPromoteToNewValueStore()
685   if (HII->isPostIncrement(PacketMI) && PacketMI.mayLoad() &&  in canPromoteToNewValueStore()
686       getPostIncrementOperand(PacketMI, HII).getReg() == DepReg) {  in canPromoteToNewValueStore()
695   if (isLoadAbsSet(PacketMI) && getAbsSetOperand(PacketMI).getReg() == DepReg)  in canPromoteToNewValueStore()
700   if (HII->isPredicated(PacketMI)) {  in canPromoteToNewValueStore()
711     for (auto &MO : PacketMI.operands()) {  in canPromoteToNewValueStore()
743         HII->isDotNewInst(PacketMI) != HII->isDotNewInst(MI) ||  in canPromoteToNewValueStore()
744         getPredicateSense(MI, HII) != getPredicateSense(PacketMI, HII))  in canPromoteToNewValueStore()
765     if (&TempMI != &PacketMI && !StartCheck) // Start processing only after  in canPromoteToNewValueStore()
769     if (&TempMI == &PacketMI) // We don't want to check PacketMI for dependence.  in canPromoteToNewValueStore()
795   for (auto &MO : PacketMI.operands()) {  in canPromoteToNewValueStore()
827   MachineInstr &PacketMI = *PacketSU->getInstr();  in canPromoteToNewValue()  local
828   if (canPromoteToNewValueStore(MI, PacketMI, DepReg))  in canPromoteToNewValue()