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Searched refs:PReg (Results 1 – 25 of 26) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyReplacePhysRegs.cpp76 for (unsigned PReg = WebAssembly::NoRegister + 1; in runOnMachineFunction() local
77 PReg < WebAssembly::NUM_TARGET_REGS; ++PReg) { in runOnMachineFunction()
79 if (PReg == WebAssembly::VALUE_STACK || PReg == WebAssembly::ARGUMENTS) in runOnMachineFunction()
83 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg); in runOnMachineFunction()
86 llvm::make_early_inc_range(MRI.reg_operands(PReg))) { in runOnMachineFunction()
90 if (PReg == TRI.getFrameRegister(MF)) { in runOnMachineFunction()
95 dbgs() << "replacing preg " << PReg << " with " << VReg << " (" in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegUsageInfoCollector.cpp181 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in run() local
183 if (SavedRegs.test(PReg)) in run()
187 if (!MRI->def_empty(PReg)) { in run()
188 for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI) in run()
196 if (UsedPhysRegsMask.test(PReg)) in run()
197 SetRegAsDefined(PReg); in run()
208 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in run()
209 if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg)) in run()
210 dbgs() << printReg(PReg, TRI) << " "; in run()
H A DRegisterUsageInfo.cpp93 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print() local
94 if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg)) in print()
95 OS << printReg(PReg, TRI) << " "; in print()
H A DRegAllocPBQP.cpp624 MCRegister PReg(R); in initializeGraph() local
625 if (MRI.isReserved(PReg)) in initializeGraph()
629 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg)) in initializeGraph()
634 for (MCRegUnit Unit : TRI.regunits(PReg)) { in initializeGraph()
644 VRegAllowed.push_back(PReg); in initializeGraph()
735 MCRegister PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOpt - 1]; in mapPBQPToRegAlloc() local
737 << TRI.getName(PReg) << "\n"); in mapPBQPToRegAlloc()
738 assert(PReg != 0 && "Invalid preg selected."); in mapPBQPToRegAlloc()
739 VRM.assignVirt2Phys(VReg, PReg); in mapPBQPToRegAlloc()
761 Register PReg = MRI.getSimpleHint(LI.reg()); in finalizeAlloc() local
[all …]
H A DCallingConvLower.cpp254 for (MCRegister PReg : RemainingRegs) { in analyzeMustTailForwardedRegisters() local
255 Register VReg = MF.addLiveIn(PReg, RC); in analyzeMustTailForwardedRegisters()
256 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT)); in analyzeMustTailForwardedRegisters()
H A DMachineRegisterInfo.cpp473 Register MachineRegisterInfo::getLiveInVirtReg(MCRegister PReg) const { in getLiveInVirtReg()
475 if (LI.first == PReg) in getLiveInVirtReg()
H A DMachineFunction.cpp763 Register MachineFunction::addLiveIn(MCRegister PReg, in addLiveIn() argument
766 Register VReg = MRI.getLiveInVirtReg(PReg); in addLiveIn()
775 assert((VRegRC == RC || (VRegRC->contains(PReg) && in addLiveIn()
781 MRI.addLiveIn(PReg, VReg); in addLiveIn()
H A DMachineVerifier.cpp659 void MachineVerifier::report_context(MCPhysReg PReg) const { in report_context()
660 OS << "- p. register: " << printReg(PReg, TRI) << '\n'; in report_context()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h56 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
57 unsigned getVirtRegFor(unsigned PReg) const;
H A DHexagonBitTracker.cpp1242 unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const { in getNextPhysReg() argument
1245 bool Is64 = DoubleRegsRegClass.contains(PReg); in getNextPhysReg()
1246 assert(PReg == 0 || Is64 || IntRegsRegClass.contains(PReg)); in getNextPhysReg()
1254 if (PReg == 0) in getNextPhysReg()
1262 if (Phys32[Idx32] == PReg) in getNextPhysReg()
1269 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1281 unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const { in getVirtRegFor()
1283 if (P.first == PReg) in getVirtRegFor()
H A DHexagonBlockRanges.cpp278 unsigned PReg = *RC.begin(); in expandToSubRegs() local
279 MCSubRegIndexIterator I(PReg, &TRI); in expandToSubRegs()
H A DHexagonInstrInfo.cpp1374 Register PReg = Op1.getReg(); in expandPostRAPseudo() local
1383 .addReg(PReg, S) in expandPostRAPseudo()
1392 .addReg(PReg, PState) in expandPostRAPseudo()
1407 Register PReg = Op1.getReg(); in expandPostRAPseudo() local
1418 .addReg(PReg, S) in expandPostRAPseudo()
1430 .addReg(PReg, PState) in expandPostRAPseudo()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h148 ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT) in ForwardedRegister()
149 : VReg(VReg), PReg(PReg), VT(VT) {} in ForwardedRegister()
151 MCPhysReg PReg; member
H A DMachineRegisterInfo.h1024 LLVM_ABI Register getLiveInVirtReg(MCRegister PReg) const;
H A DMachineFunction.h969 Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC);
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp573 MBB.addLiveIn(F.PReg); in handleMustTailForwardedRegisters()
574 MIRBuilder.buildCopy(Register(F.VReg), Register(F.PReg)); in handleMustTailForwardedRegisters()
1265 Register ForwardedReg = F.PReg; in lowerTailCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp1015 Register PReg = PMO.getReg(); in FormCandidates() local
1017 : TRI->getEncodingValue(PReg); in FormCandidates()
1026 PReg == getLoadStoreBaseOp(*MI).getReg()) in FormCandidates()
1037 if (PReg == ARM::SP || PReg == ARM::PC) in FormCandidates()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp1062 for (MCRegister PReg : in emitZeroCallUsedRegs()
1067 if (RegsToZero[PReg]) in emitZeroCallUsedRegs()
1068 BuildMI(MBB, MBBI, DL, TII.get(AArch64::PFALSE), PReg); in emitZeroCallUsedRegs()
3199 for (unsigned PReg = AArch64::P8; PReg <= AArch64::P15; ++PReg) { in findFreePredicateReg() local
3200 if (SavedRegs.test(PReg)) { in findFreePredicateReg()
3201 unsigned PNReg = PReg - AArch64::P0 + AArch64::PN0; in findFreePredicateReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp3664 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
3669 PReg = X86::RBP; in adjustForHiPEPrologue()
3675 PReg = X86::EBP; in adjustForHiPEPrologue()
3690 PReg, false, SPLimitOffset); in adjustForHiPEPrologue()
3700 PReg, false, SPLimitOffset); in adjustForHiPEPrologue()
H A DX86ISelLoweringCall.cpp2355 RegsToPass.push_back(std::make_pair(F.PReg, Val)); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3827 auto PReg = mc2PseudoReg(Reg); in usesConstantBus() local
3828 return isSGPR(PReg, TRI) && PReg != SGPR_NULL; in usesConstantBus()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1372 addLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) in addLiveIn() argument
1375 MF.getRegInfo().addLiveIn(PReg, VReg); in addLiveIn()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp554 Register PReg = Next->getOperand(0).getReg(); in isLibCallInTailPosition() local
555 if (!PReg.isPhysical()) in isLibCallInTailPosition()
565 if (!Ret->getOperand(0).isReg() || PReg != Ret->getOperand(0).getReg()) in isLibCallInTailPosition()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp706 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall()
/freebsd/contrib/file/magic/Magdir/
H A Dwindows1896 0 string PReg

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