Home
last modified time | relevance | path

Searched refs:PReg (Results 1 – 25 of 26) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegUsageInfoCollector.cpp157 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction() local
159 if (SavedRegs.test(PReg)) in runOnMachineFunction()
163 if (!MRI->def_empty(PReg)) { in runOnMachineFunction()
164 for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
172 if (UsedPhysRegsMask.test(PReg)) in runOnMachineFunction()
173 SetRegAsDefined(PReg); in runOnMachineFunction()
184 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
185 if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg)) in runOnMachineFunction()
186 dbgs() << printReg(PReg, TRI) << " "; in runOnMachineFunction()
H A DRegisterUsageInfo.cpp93 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print() local
94 if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg)) in print()
95 OS << printReg(PReg, TRI) << " "; in print()
H A DRegAllocPBQP.cpp627 MCRegister PReg(R); in initializeGraph() local
628 if (MRI.isReserved(PReg)) in initializeGraph()
632 if (!RegMaskOverlaps.empty() && !RegMaskOverlaps.test(PReg)) in initializeGraph()
637 for (MCRegUnit Unit : TRI.regunits(PReg)) { in initializeGraph()
647 VRegAllowed.push_back(PReg); in initializeGraph()
738 MCRegister PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOpt - 1]; in mapPBQPToRegAlloc() local
740 << TRI.getName(PReg) << "\n"); in mapPBQPToRegAlloc()
741 assert(PReg != 0 && "Invalid preg selected."); in mapPBQPToRegAlloc()
742 VRM.assignVirt2Phys(VReg, PReg); in mapPBQPToRegAlloc()
764 Register PReg = MRI.getSimpleHint(LI.reg()); in finalizeAlloc() local
[all …]
H A DCallingConvLower.cpp254 for (MCPhysReg PReg : RemainingRegs) { in analyzeMustTailForwardedRegisters() local
255 Register VReg = MF.addLiveIn(PReg, RC); in analyzeMustTailForwardedRegisters()
256 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT)); in analyzeMustTailForwardedRegisters()
H A DMachineFunction.cpp722 Register MachineFunction::addLiveIn(MCRegister PReg, in addLiveIn() argument
725 Register VReg = MRI.getLiveInVirtReg(PReg); in addLiveIn()
734 assert((VRegRC == RC || (VRegRC->contains(PReg) && in addLiveIn()
740 MRI.addLiveIn(PReg, VReg); in addLiveIn()
H A DMachineRegisterInfo.cpp469 Register MachineRegisterInfo::getLiveInVirtReg(MCRegister PReg) const { in getLiveInVirtReg()
471 if (LI.first == PReg) in getLiveInVirtReg()
H A DMachineVerifier.cpp617 void MachineVerifier::report_context(MCPhysReg PReg) const { in report_context()
618 errs() << "- p. register: " << printReg(PReg, TRI) << '\n'; in report_context()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyReplacePhysRegs.cpp76 for (unsigned PReg = WebAssembly::NoRegister + 1; in runOnMachineFunction() local
77 PReg < WebAssembly::NUM_TARGET_REGS; ++PReg) { in runOnMachineFunction()
79 if (PReg == WebAssembly::VALUE_STACK || PReg == WebAssembly::ARGUMENTS) in runOnMachineFunction()
83 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg); in runOnMachineFunction()
86 llvm::make_early_inc_range(MRI.reg_operands(PReg))) { in runOnMachineFunction()
90 if (PReg == TRI.getFrameRegister(MF)) { in runOnMachineFunction()
95 dbgs() << "replacing preg " << PReg << " with " << VReg << " (" in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h57 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
58 unsigned getVirtRegFor(unsigned PReg) const;
H A DHexagonBitTracker.cpp1250 unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const { in getNextPhysReg() argument
1253 bool Is64 = DoubleRegsRegClass.contains(PReg); in getNextPhysReg()
1254 assert(PReg == 0 || Is64 || IntRegsRegClass.contains(PReg)); in getNextPhysReg()
1262 if (PReg == 0) in getNextPhysReg()
1270 if (Phys32[Idx32] == PReg) in getNextPhysReg()
1277 if (Phys64[Idx64] == PReg) in getNextPhysReg()
1289 unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const { in getVirtRegFor()
1291 if (P.first == PReg) in getVirtRegFor()
H A DHexagonBlockRanges.cpp279 unsigned PReg = *RC.begin(); in expandToSubRegs() local
280 MCSubRegIndexIterator I(PReg, &TRI); in expandToSubRegs()
H A DHexagonInstrInfo.cpp1371 Register PReg = Op1.getReg(); in expandPostRAPseudo() local
1380 .addReg(PReg, S) in expandPostRAPseudo()
1389 .addReg(PReg, PState) in expandPostRAPseudo()
1404 Register PReg = Op1.getReg(); in expandPostRAPseudo() local
1415 .addReg(PReg, S) in expandPostRAPseudo()
1427 .addReg(PReg, PState) in expandPostRAPseudo()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h147 ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT) in ForwardedRegister()
148 : VReg(VReg), PReg(PReg), VT(VT) {} in ForwardedRegister()
150 MCPhysReg PReg; member
H A DMachineRegisterInfo.h1017 Register getLiveInVirtReg(MCRegister PReg) const;
H A DMachineFunction.h916 Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC);
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp524 MBB.addLiveIn(F.PReg); in handleMustTailForwardedRegisters()
525 MIRBuilder.buildCopy(Register(F.VReg), Register(F.PReg)); in handleMustTailForwardedRegisters()
1216 Register ForwardedReg = F.PReg; in lowerTailCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp1018 Register PReg = PMO.getReg(); in FormCandidates() local
1020 : TRI->getEncodingValue(PReg); in FormCandidates()
1029 PReg == getLoadStoreBaseOp(*MI).getReg()) in FormCandidates()
1040 if (PReg == ARM::SP || PReg == ARM::PC) in FormCandidates()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp3600 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
3605 PReg = X86::RBP; in adjustForHiPEPrologue()
3611 PReg = X86::EBP; in adjustForHiPEPrologue()
3626 PReg, false, SPLimitOffset); in adjustForHiPEPrologue()
3636 PReg, false, SPLimitOffset); in adjustForHiPEPrologue()
H A DX86ISelLoweringCall.cpp2312 RegsToPass.push_back(std::make_pair(F.PReg, Val)); in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp1031 for (MCRegister PReg : in emitZeroCallUsedRegs()
1036 if (RegsToZero[PReg]) in emitZeroCallUsedRegs()
1037 BuildMI(MBB, MBBI, DL, TII.get(AArch64::PFALSE), PReg); in emitZeroCallUsedRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp3687 auto PReg = mc2PseudoReg(Reg); in usesConstantBus() local
3688 return isSGPR(PReg, TRI) && PReg != SGPR_NULL; in usesConstantBus()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1277 addLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) in addLiveIn() argument
1280 MF.getRegInfo().addLiveIn(PReg, VReg); in addLiveIn()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp540 Register PReg = Next->getOperand(0).getReg(); in isLibCallInTailPosition() local
541 if (!PReg.isPhysical()) in isLibCallInTailPosition()
551 if (!Ret->getOperand(0).isReg() || PReg != Ret->getOperand(0).getReg()) in isLibCallInTailPosition()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp704 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall()
/freebsd/contrib/file/magic/Magdir/
H A Dwindows1821 0 string PReg

12