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Searched refs:Opnd (Results 1 – 25 of 25) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSDPatternMatch.h652 Opnd_P Opnd;
654 UnaryOpc_match(unsigned Opc, const Opnd_P &Op) : Opcode(Opc), Opnd(Op) {}
661 return Opnd.match(Ctx, N->getOperand(EO.FirstIndex));
668 template <typename Opnd>
669 inline UnaryOpc_match<Opnd> m_UnaryOp(unsigned Opc, const Opnd &Op) {
670 return UnaryOpc_match<Opnd>(Opc, Op);
672 template <typename Opnd>
673 inline UnaryOpc_match<Opnd, true> m_ChainedUnaryOp(unsigned Opc,
674 const Opnd &Op) {
675 return UnaryOpc_match<Opnd, true>(Opc, Op);
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/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCInstPrinter.cpp91 const MCOperand &Opnd = MI.getOperand(OpIdx); in matchAliasCondition() local
98 return Opnd.isImm() && Opnd.getImm() == int32_t(C.Value); in matchAliasCondition()
101 return Opnd.isReg() && Opnd.getReg() == C.Value; in matchAliasCondition()
104 return Opnd.isReg() && Opnd.getReg() == MI.getOperand(C.Value).getReg(); in matchAliasCondition()
107 return Opnd.isReg() && MRI.getRegClass(C.Value).contains(Opnd.getReg()); in matchAliasCondition()
110 return M.ValidateMCOperand(Opnd, *ST in matchAliasCondition()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FixupLEAs.cpp417 MachineOperand &Opnd = CurInst->getOperand(I); in searchALUInst()
418 if (Opnd.isReg()) { in searchALUInst()
419 if (Opnd.getReg() == DestReg) { in searchALUInst()
420 if (Opnd.isDef() || !Opnd.isKill()) in searchALUInst()
440 if (TRI->regsOverlap(DestReg, Opnd.getReg())) in searchALUInst()
463 for (MachineOperand &Opnd : CurInst.operands()) { in checkRegUsage()
464 if (!Opnd.isReg()) in checkRegUsage()
466 Register Reg = Opnd.getReg(); in checkRegUsage()
470 if (Opnd in checkRegUsage()
416 MachineOperand &Opnd = CurInst->getOperand(I); searchALUInst() local
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H A DX86FastISel.cpp2354 const Value *Opnd = nullptr; in X86SelectSelect() local
2357 case CmpInst::FCMP_FALSE: Opnd = I->getOperand(2); break; in X86SelectSelect()
2358 case CmpInst::FCMP_TRUE: Opnd = I->getOperand(1); break; in X86SelectSelect()
2361 if (Opnd) { in X86SelectSelect()
2362 Register OpReg = getRegForValue(Opnd); in X86SelectSelect()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DObjCARC.h66 const auto *Opnd = Inst.getOperand(0)->stripPointerCasts(); in getreturnRVOperand() local
67 if (const auto *C = dyn_cast<CallInst>(Opnd)) in getreturnRVOperand()
69 return dyn_cast<InvokeInst>(Opnd); in getreturnRVOperand()
H A DObjCARCOpts.cpp877 for (Value *Opnd : PN->incoming_values()) in isInertARCValue()
878 if (!isInertARCValue(Opnd, VisitedPhis)) in isInertARCValue()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DConstantHoisting.cpp178 Value *Opnd = Inst->getOperand(Idx); in findMatInsertPt() local
179 if (auto CastInst = dyn_cast<Instruction>(Opnd)) in findMatInsertPt()
459 Value *Opnd = Inst->getOperand(Idx); in collectConstantCandidates() local
462 if (auto ConstInt = dyn_cast<ConstantInt>(Opnd)) { in collectConstantCandidates()
468 if (auto CastInst = dyn_cast<Instruction>(Opnd)) { in collectConstantCandidates()
483 if (auto ConstExpr = dyn_cast<ConstantExpr>(Opnd)) { in collectConstantCandidates()
783 Value *Opnd = Adj->User.Inst->getOperand(Adj->User.OpndIdx); in emitBaseConstants() local
786 if (isa<ConstantInt>(Opnd)) { in emitBaseConstants()
795 if (auto CastInst = dyn_cast<Instruction>(Opnd)) { in emitBaseConstants()
817 if (auto ConstExpr = dyn_cast<ConstantExpr>(Opnd)) { in emitBaseConstants()
H A DInferAddressSpaces.cpp243 unsigned getPredicatedAddrSpace(const Value &V, Value *Opnd) const;
893 Value *Opnd) const { in getPredicatedAddrSpace()
898 Opnd = Opnd->stripInBoundsOffsets(); in getPredicatedAddrSpace()
899 for (auto &AssumeVH : AC.assumptionsFor(Opnd)) { in getPredicatedAddrSpace()
H A DReassociate.cpp1240 static Value *createAndInstr(BasicBlock::iterator InsertBefore, Value *Opnd, in createAndInstr() argument
1246 return Opnd; in createAndInstr()
1249 Opnd, ConstantInt::get(Opnd->getType(), ConstOpnd), "and.ra", in createAndInstr()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp164 const MachineOperand &Opnd = DefInst->getOperand(0); in checkADDrr() local
165 if (Opnd.isReg() && Opnd.getReg() == MO.getReg()) in checkADDrr()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2003 MCOperand Opnd; in processInstruction() local
2016 Opnd = Inst.getOperand(1); in processInstruction()
2017 if (!Opnd.isImm()) in processInstruction()
2019 Imm = Opnd.getImm(); in processInstruction()
2033 Opnd = Inst.getOperand(2); in processInstruction()
2034 if (!Opnd.isImm()) in processInstruction()
2036 Imm = Opnd.getImm(); in processInstruction()
2200 MCOperand Opnd; in processInstruction() local
2207 Opnd = Inst.getOperand(0); in processInstruction()
2208 if (!Opnd.isImm()) in processInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp3114 TruncBuilder(Instruction *Opnd, Type *Ty) : TypePromotionAction(Opnd) { in TruncBuilder() argument
3115 IRBuilder<> Builder(Opnd); in TruncBuilder()
3117 Val = Builder.CreateTrunc(Opnd, Ty, "promoted"); in TruncBuilder()
3140 SExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty) in SExtBuilder() argument
3143 Val = Builder.CreateSExt(Opnd, Ty, "promoted"); in SExtBuilder()
3166 ZExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty) in ZExtBuilder() argument
3170 Val = Builder.CreateZExt(Opnd, Ty, "promoted"); in ZExtBuilder()
3356 Value *createTrunc(Instruction *Opnd, Type *Ty);
3359 Value *createSExt(Instruction *Inst, Value *Opnd, Type *Ty);
3362 Value *createZExt(Instruction *Inst, Value *Opnd, Type *Ty);
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrArithmetic.td1027 class MxFUnary_FF<MxOpBundle Opnd, string rounding,
1029 : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src),
1070 class MxFBinary_FF<MxOpBundle Opnd, string rounding,
1072 : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src, Opnd.Op:$opd),
H A DM68kISelDAGToDAG.cpp969 auto addKind = [this](SDValue &Opnd, AMK Kind) -> bool { in SelectInlineAsmMemoryOperand() argument
970 Opnd = CurDAG->getTargetConstant(unsigned(Kind), SDLoc(), MVT::i32); in SelectInlineAsmMemoryOperand()
H A DM68kInstrData.td681 MxOpBundle Opnd = !cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr")>
682 : MxFMove<"x", (outs Opnd.Op:$dst), (ins Opnd.Op:$src),
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAddSub.cpp616 for (const FAddend *Opnd : Opnds) { in createNaryFAdd() local
618 Value *V = createAddendVal(*Opnd, NeedNeg); in createNaryFAdd()
696 for (const FAddend *Opnd : Opnds) { in calcInstrNumber() local
697 if (Opnd->isConstant()) in calcInstrNumber()
702 if (isa<UndefValue>(Opnd->getSymVal())) in calcInstrNumber()
705 const FAddendCoef &CE = Opnd->getCoef(); in calcInstrNumber()
723 Value *FAddCombine::createAddendVal(const FAddend &Opnd, bool &NeedNeg) { in createAddendVal() argument
724 const FAddendCoef &Coeff = Opnd.getCoef(); in createAddendVal()
726 if (Opnd.isConstant()) { in createAddendVal()
731 Value *OpndVal = Opnd.getSymVal(); in createAddendVal()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DInstrInfoEmitter.cpp1185 auto &Opnd = Inst.Operands[Inst.Operands.NumDefs - 1]; in emitRecord() local
1186 DefOperands = Opnd.MIOperandNo + Opnd.MINumOperands; in emitRecord()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp86 addOperand(MCInst &Inst, const MCOperand& Opnd) { in addOperand() argument
87 Inst.addOperand(Opnd); in addOperand()
88 return Opnd.isValid() ? in addOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp1322 SDValue Opnd = Op->getOperand(++OpNo), In64; in lowerDSPIntr() local
1324 if (Opnd.getValueType() == MVT::i64) in lowerDSPIntr()
1325 In64 = initAccumulator(Opnd, DL, DAG); in lowerDSPIntr()
1327 Ops.push_back(Opnd); in lowerDSPIntr()
H A DMicroMips32r6InstrInfo.td1787 class JumpLinkMMR6<Instruction JumpInst, DAGOperand Opnd> :
1789 PseudoInstExpansion<(JumpInst Opnd:$target)>;
H A DMipsInstrInfo.td1605 class TailCall<Instruction JumpInst, DAGOperand Opnd> :
1607 PseudoInstExpansion<(JumpInst Opnd:$target)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2035 for (auto &Opnd : MI->uses()) { in selectLoad() local
2036 if (Opnd.isReg()) { in selectLoad()
2037 Reg = Opnd.getReg(); in selectLoad()
H A DAArch64ISelLowering.cpp18270 SDValue Opnd = V->getOperand(1); in performMulCombine() local
18273 std::swap(Opnd, MulOper); in performMulCombine()
18274 if (auto C = dyn_cast<ConstantSDNode>(Opnd)) in performMulCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp5488 for (const SDValue &Opnd : Op->ops()) in isKnownNeverNaN() local
5489 if (!isKnownNeverNaN(Opnd, SNaN, Depth + 1)) in isKnownNeverNaN()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp14074 SDValue Opnd = V->getOperand(1); in performMULCombine()
14077 std::swap(Opnd, MulOper); in performMULCombine()
14078 if (isOneOrOneSplat(Opnd)) in performMULCombine()
14071 SDValue Opnd = V->getOperand(1); performMULCombine() local